H05K 2201/095
Conductive through-holes or vias
H05K2201/095 (Conductive through-holes or vias) appears on 5,315 US grants and 5,499 published applications in this corpus.
Search patents in H05K- Granted patents
- 5,315
- Published applications
- 5,499
- Assignees
- 1,307
- Inventors
- 9,578
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 7 | 0 |
| 1977 | 7 | 0 |
| 1978 | 6 | 0 |
| 1979 | 4 | 0 |
| 1980 | 9 | 0 |
| 1981 | 13 | 0 |
| 1982 | 8 | 0 |
| 1983 | 13 | 0 |
| 1984 | 14 | 0 |
| 1985 | 26 | 0 |
| 1986 | 23 | 0 |
| 1987 | 28 | 0 |
| 1988 | 33 | 0 |
| 1989 | 31 | 0 |
| 1990 | 36 | 0 |
| 1991 | 47 | 0 |
| 1992 | 46 | 0 |
| 1993 | 44 | 0 |
| 1994 | 53 | 0 |
| 1995 | 68 | 0 |
| 1996 | 68 | 0 |
| 1997 | 62 | 0 |
| 1998 | 78 | 0 |
| 1999 | 86 | 0 |
| 2000 | 99 | 0 |
| 2001 | 136 | 85 |
| 2002 | 163 | 171 |
| 2003 | 156 | 185 |
| 2004 | 185 | 235 |
| 2005 | 136 | 216 |
| 2006 | 177 | 281 |
| 2007 | 147 | 281 |
| 2008 | 183 | 356 |
| 2009 | 147 | 342 |
| 2010 | 213 | 267 |
| 2011 | 224 | 224 |
| 2012 | 251 | 198 |
| 2013 | 203 | 164 |
| 2014 | 161 | 166 |
| 2015 | 144 | 198 |
| 2016 | 153 | 185 |
| 2017 | 194 | 148 |
| 2018 | 154 | 164 |
| 2019 | 173 | 176 |
| 2020 | 185 | 210 |
| 2021 | 164 | 194 |
| 2022 | 177 | 222 |
| 2023 | 163 | 225 |
| 2024 | 150 | 205 |
| 2025 | 164 | 217 |
| 2026 | 103 | 184 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- H05K 2201/096Vertically aligned vias, holes or stacked viasIndexing code1,224
- H05K 2201/09509Blind vias, i.e. vias having one side closedIndexing code1,221
- H05K 2201/09563Metal filled viaIndexing code1,004
- H05K 2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before laminationIndexing code720
- H05K 2201/0959Plated through-holes or plated blind vias filled with insulating materialIndexing code651
- H05K 2201/09618Via fence, i.e. one-dimensional array of viasIndexing code581
- H05K 2201/09609Via grid, i.e. two-dimensional array of vias or holes in a singleIndexing code382
- H05K 2201/09627Special connections between adjacent vias, not for grounding viasIndexing code313
All 14 subgroupsShow fewer
- H05K 2201/09645Patterning on via wallsIndexing code274
- H05K 2201/09554Via connected to metal substrateIndexing code220
- H05K 2201/09581Applying an insulating coating on the walls of holesIndexing code185
- H05K 2201/09545Plated through-holes or blind vias without landsIndexing code177
- H05K 2201/09572Solder filled plated through-hole in the final productIndexing code170
- H05K 2201/09636Details of adjacent, not connected viasIndexing code139
Recent patents
- Buried skip vias for improved signal and power integrity6 Oct 2026US 12,757,327 B2NVIDIA Corporation
- Circuit board and manufacturing method thereof29 Sep 2026US 12,750,953 B2Samsung Electro-Mechanics Co., Ltd.
- Electronic component and method of manufacturing the same29 Sep 2026US 12,750,954 B2Murata Manufacturing Co., Ltd.
- Camera module comprising circuit board with lateral connecting belts22 Sep 2026US 12,744,982 B2Ningbo Sunny Opotech Co., Ltd.
- Electronic device comprising interposer printed circuit board22 Sep 2026US 12,745,349 B2Samsung Electronics Co., Ltd.
- Signal transmission structure for signal transmission in multi-layer circuit board and electronic device including the same8 Oct 2026US 2026/0312270 A1Samsung Electronics Co., Ltd.
- Printed circuit board8 Oct 2026US 2026/0313787 A1Samsung Electro-Mechanics Co., Ltd.
- Printed wiring board1 Oct 2026US 2026/0304599 A1Sumitomo Electric Industries, Ltd.
- Component Carrier With Porous Body, and Manufacture Method1 Oct 2026US 2026/0304615 A1AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
- Component Carrier With Embedded Vertical Connection, And Manufacture Method1 Oct 2026US 2026/0304619 A1AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
Most cited
By later US patents
- Method and apparatus for 3D interconnect542US 8,076,237 B2ASM America, Inc. · 2011
- Electroless CU deposition on a barrier layer by CU contact displacement for ULSI applications448US 5,891,513 ACornell Research Foundation, Inc. · 1999
- Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system387US 7,619,901 B2EPIC Technologies, Inc. · 2009
- Method of manufacturing a semiconductor package336US 7,185,426 B1Amkor Technology, Inc. · 2007
- Three-dimensional multichip module systems334US 5,111,278 A1992