H10W 20/211
Through-semiconductor vias
Official title: {Through-semiconductor vias, e.g. TSVs}
H10W20/211 (Through-semiconductor vias) appears on 3,899 US grants and 4,952 published applications in this corpus.
Search patents in H10W- Granted patents
- 3,899
- Published applications
- 4,952
- Assignees
- 505
- Inventors
- 5,245
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 2 | 0 |
| 1991 | 3 | 0 |
| 1992 | 1 | 0 |
| 1993 | 0 | 0 |
| 1994 | 3 | 0 |
| 1995 | 3 | 0 |
| 1996 | 3 | 0 |
| 1997 | 6 | 0 |
| 1998 | 10 | 0 |
| 1999 | 5 | 0 |
| 2000 | 10 | 0 |
| 2001 | 12 | 6 |
| 2002 | 24 | 31 |
| 2003 | 19 | 26 |
| 2004 | 33 | 40 |
| 2005 | 33 | 61 |
| 2006 | 40 | 86 |
| 2007 | 24 | 74 |
| 2008 | 35 | 103 |
| 2009 | 72 | 135 |
| 2010 | 94 | 207 |
| 2011 | 147 | 244 |
| 2012 | 171 | 281 |
| 2013 | 257 | 264 |
| 2014 | 293 | 259 |
| 2015 | 241 | 277 |
| 2016 | 268 | 207 |
| 2017 | 245 | 226 |
| 2018 | 232 | 194 |
| 2019 | 173 | 183 |
| 2020 | 206 | 236 |
| 2021 | 186 | 258 |
| 2022 | 184 | 339 |
| 2023 | 247 | 348 |
| 2024 | 258 | 331 |
| 2025 | 237 | 253 |
| 2026 | 119 | 283 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- H10W 20/213Cross-sectional shapes or dispositions2,000
- H10W 20/212Top-view shapes or dispositions1,826
- H10W 20/216Characterised by dielectric material at least partially filling the via holes495
- H10W 20/217Comprising ring-shaped isolation structures outside of the via holes469
- H10W 20/218In silicon-on-insulator [soi] wafers397
- H10W 20/215Characterised by thin functional layers between the through-semiconductor vias and sidewalls of1
Recent patents
- Semiconductor device with polymer liner and method for fabricating the same6 Oct 2026US 12,757,707 B2Nanya Technology Corporation
- Barrier layers for interconnects in bonded wafers6 Oct 2026US 12,757,721 B2United Microelectronics Corp.
- Molded direct bonded and interconnected stack15 Sep 2026US 12,740,490 B2Adeia Semiconductor Bonding Technologies Inc.
- Semiconductor device25 Aug 2026US 12,720,802 B2Samsung Electronics Co., Ltd.
- Through-substrate-via in photosensitive module25 Aug 2026US 12,720,900 B2Semiconductor Components Industries, LLC
- A Multi-Layer Deep-Trench Capacitor8 Oct 2026US 2026/0313925 A1Lotus Microsystems Aps
- Semiconductor structures with through via8 Oct 2026US 2026/0314366 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Low resistance structures in systems8 Oct 2026US 2026/0314467 A1Micron Technology, Inc.
- Integrated circuit structure and manufacturing method thereof8 Oct 2026US 2026/0314480 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor structure and method for producing same8 Oct 2026US 2026/0314482 A1Mitsui Chemicals, Inc.
Most cited
By later US patents
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices775US 7,157,787 B2Intel Corporation · 2007
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices528US 6,762,076 B2Intel Corporation · 2004
- Three-dimensional integrated semiconductor devices526US 6,943,067 B2Advanced Micro Devices, Inc. · 2005
- Method for producing interconnect structures for integrated circuits524US 8,252,659 B2Imec · 2012
- Method for making three dimensional circuit integration485US 5,998,292 AInternational Business Machines Corporation · 1999