H10W 74/141
The encapsulations being on at least the sidewalls of the semiconductor body
Official title: {the encapsulations being on at least the sidewalls of the semiconductor body}
H10W74/141 (The encapsulations being on at least the sidewalls of the semiconductor body) appears on 1,229 US grants and 1,698 published applications in this corpus.
Search patents in H10W- Granted patents
- 1,229
- Published applications
- 1,698
- Assignees
- 370
- Inventors
- 2,722
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 2 | 0 |
| 1991 | 0 | 0 |
| 1992 | 1 | 0 |
| 1993 | 3 | 0 |
| 1994 | 0 | 0 |
| 1995 | 2 | 0 |
| 1996 | 5 | 0 |
| 1997 | 3 | 0 |
| 1998 | 4 | 0 |
| 1999 | 5 | 0 |
| 2000 | 2 | 0 |
| 2001 | 7 | 3 |
| 2002 | 9 | 13 |
| 2003 | 9 | 10 |
| 2004 | 9 | 14 |
| 2005 | 11 | 22 |
| 2006 | 16 | 17 |
| 2007 | 19 | 19 |
| 2008 | 12 | 32 |
| 2009 | 13 | 29 |
| 2010 | 24 | 44 |
| 2011 | 26 | 14 |
| 2012 | 27 | 26 |
| 2013 | 23 | 45 |
| 2014 | 39 | 47 |
| 2015 | 30 | 46 |
| 2016 | 57 | 66 |
| 2017 | 66 | 82 |
| 2018 | 60 | 68 |
| 2019 | 80 | 82 |
| 2020 | 86 | 127 |
| 2021 | 82 | 148 |
| 2022 | 100 | 156 |
| 2023 | 123 | 131 |
| 2024 | 112 | 172 |
| 2025 | 95 | 156 |
| 2026 | 60 | 129 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Die package structure and method for forming the same29 Sep 2026US 12,751,314 B2Winbond Electronics Corp.
- Semiconductor devices and methods of manufacturing semiconductor devices15 Sep 2026US 12,740,473 B2Amkor Technology Singapore Holding Pte.Ltd.
- Chip package with contact clip8 Sep 2026US 12,730,135 B2Infineon Technologies AG
- Microelectronic assemblies having integrated thin film capacitors8 Sep 2026US 12,733,499 B2Intel Corporation
- Two-part molding of device packages with spacers8 Sep 2026US 12,733,537 B2NXP USA, Inc.
- Method of filling gaps between dies using silicon dioxide8 Oct 2026US 2026/0314481 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated circuit package1 Oct 2026US 2026/0305337 A1STMicroelectronics International N. V.
- Semiconductor Device and Method of Forming Fan-Out Wafer Level CPO with Through Mold Conductive Via1 Oct 2026US 2026/0305389 A1STATS ChipPAC Pte. Ltd.
- Semiconductor package1 Oct 2026US 2026/0305402 A1Mediatek Inc.
- Microelectronic device package with open cavity1 Oct 2026US 2026/0305456 A1Texas Instruments Incorporated
Most cited
By later US patents
- Fan-out interconnect structure and method for forming same1,030US 9,368,460 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Method for reducing particle generation at bevel portion of substrate468US 9,343,343 B2ASM IP Holding B. V. · 2016
- Process of mounting tape automated bonded semiconductor chip on printed circuit board through bumps253US 5,474,957 ANEC Corporation · 1995
- Method of manufacturing a semiconductor device including removing a relief layer from back surface of semiconductor chip229US 9,646,856 B2Intel Deutschland GmbH · 2017
- High electron mobility transistor213US 5,796,127 AMitsubishi Denki Kabushiki Kaisha · 1998