H10W 10/0148
Comprising introducing impurities in side walls or bottom walls of trenches
Official title: {comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers}
H10W10/0148 (Comprising introducing impurities in side walls or bottom walls of trenches) appears on 714 US grants and 578 published applications in this corpus.
Search patents in H10W- Granted patents
- 714
- Published applications
- 578
- Assignees
- 212
- Inventors
- 1,387
- Latest grant
- 28 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 4 | 0 |
| 1984 | 5 | 0 |
| 1985 | 10 | 0 |
| 1986 | 8 | 0 |
| 1987 | 5 | 0 |
| 1988 | 2 | 0 |
| 1989 | 1 | 0 |
| 1990 | 6 | 0 |
| 1991 | 7 | 0 |
| 1992 | 6 | 0 |
| 1993 | 7 | 0 |
| 1994 | 4 | 0 |
| 1995 | 3 | 0 |
| 1996 | 3 | 0 |
| 1997 | 6 | 0 |
| 1998 | 13 | 0 |
| 1999 | 28 | 0 |
| 2000 | 30 | 0 |
| 2001 | 43 | 13 |
| 2002 | 27 | 31 |
| 2003 | 30 | 19 |
| 2004 | 25 | 30 |
| 2005 | 24 | 27 |
| 2006 | 16 | 21 |
| 2007 | 15 | 21 |
| 2008 | 11 | 24 |
| 2009 | 9 | 22 |
| 2010 | 22 | 15 |
| 2011 | 15 | 11 |
| 2012 | 13 | 19 |
| 2013 | 12 | 23 |
| 2014 | 22 | 27 |
| 2015 | 32 | 37 |
| 2016 | 37 | 34 |
| 2017 | 42 | 21 |
| 2018 | 28 | 19 |
| 2019 | 23 | 26 |
| 2020 | 19 | 25 |
| 2021 | 25 | 24 |
| 2022 | 14 | 27 |
| 2023 | 16 | 16 |
| 2024 | 16 | 20 |
| 2025 | 10 | 15 |
| 2026 | 15 | 11 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor devices28 Jul 2026US 12,696,528 B2Samsung Electronics Co., Ltd.
- Transistor device with sinker contacts and methods for manufacturing the same28 Jul 2026US 12,696,738 B2Texas Instruments Incorporated
- Reduced N-well and P-well spacing9 Jun 2026US 12,652,832 B2International Business Machines Corporation
- Semiconductor device including isolation structures doped with impurities and having charge trapping layers9 Jun 2026US 12,653,006 B2Nanya Technology Corporation
- Merged trenches surrounded by wider trench for isolating semiconductor devices19 May 2026US 12,635,488 B2Texas Instruments Incorporated
- Semiconductor device with a first isolation trench and method of manufacturing10 Sep 2026US 2026/0271686 A1Infineon Technologies AG
- Merged trenches surrounded by wider trench for isolating semiconductor devices10 Sep 2026US 2026/0271687 A1
- Method for manufacturing semiconductor device including seam-free isolation structure13 Aug 2026US 2026/0239939 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Source/drain eptiaxial layer profile21 May 2026US 2026/0143757 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and fabrication method thereof21 May 2026US 2026/0144028 A1Yangtze Memory Technologies Co., Ltd.
Most cited
By later US patents
- Material removal method for forming a structure171US 6,261,964 B1Micron Technology, Inc. · 2001
- Trench sidewall isolation by polysilicon oxidation154US 4,666,556 AInternational Business Machines Corporation · 1987
- Angled nitrogen ion implantation for minimizing mechanical stress on side walls of an isolation trench151US 6,284,626 B1Vantis Corporation · 2001
- Vertical thyristor-based memory with trench isolation and its method of fabrication147US 7,456,439 B1T-RAM Semiconductor, Inc. · 2008
- Methods and apparatus for forming ultra-shallow doped regions using doped silicon oxide films136US 5,994,209 AAPPLIED Materials.Inc. · 1999