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US 2026/0271687 A1Published application
Merged trenches surrounded by wider trench for isolating semiconductor devices
OwnerHao YANG, Asad HAIDER +4inventors
InventorsHao YANG, Asad HAIDER, Guruvayurappan MATHUR, Abbas ALI, Alexei SADOVNIKOV, Umamaheswari AGHROAM
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Abstract
Active semiconductor devices in an integrated circuit are provided lateral electrical isolation by surrounding narrow deep trench isolation regions that are merged at shared portions of the narrow deep trench isolation regions. A wide deep trench isolation region laterally surrounds the merged narrow deep trench isolation regions.
Claims9
A method of fabricating an integrated circuit (IC), the method comprising:
- forming a first lateral isolation trench region laterally surrounding a first active semiconductor device, the first lateral isolation trench region having first trench depth;
- forming a second lateral isolation trench region laterally surrounding a second active semiconductor device, the second lateral isolation trench region having a second trench depth, a portion of the second lateral isolation trench region being shared with a portion of the first lateral isolation trench region;
- and
- forming a third lateral isolation trench region laterally surrounding the first and second lateral isolation trench regions, the third lateral isolation trench region having a third trench depth greater than the first and second trench depths.
1 more element
Dependencies are inferred from the claim text.