H10W 80/011
Manufacture or treatment of pads or other interconnections to be direct bonded
Official title: {Manufacture or treatment of pads or other interconnections to be direct bonded}
H10W80/011 (Manufacture or treatment of pads or other interconnections to be direct bonded) appears on 772 US grants and 1,066 published applications in this corpus.
Search patents in H10W- Granted patents
- 772
- Published applications
- 1,066
- Assignees
- 173
- Inventors
- 1,381
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1998 | 1 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 1 |
| 2005 | 1 | 1 |
| 2006 | 0 | 0 |
| 2007 | 0 | 3 |
| 2008 | 0 | 3 |
| 2009 | 2 | 0 |
| 2010 | 2 | 5 |
| 2011 | 0 | 1 |
| 2012 | 2 | 8 |
| 2013 | 8 | 16 |
| 2014 | 16 | 24 |
| 2015 | 16 | 33 |
| 2016 | 25 | 28 |
| 2017 | 28 | 26 |
| 2018 | 34 | 41 |
| 2019 | 35 | 56 |
| 2020 | 58 | 108 |
| 2021 | 84 | 153 |
| 2022 | 98 | 136 |
| 2023 | 112 | 109 |
| 2024 | 105 | 130 |
| 2025 | 105 | 107 |
| 2026 | 40 | 77 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Nano-roughened interconnects for integrated circuit packages29 Sep 2026US 12,751,312 B2Intel Corporation
- Selective alteration of interconnect pads for direct bonding29 Sep 2026US 12,751,313 B2Adeia Semiconductor Bonding Technologies Inc.
- Direct bonding methods and structures29 Sep 2026US 12,751,323 B2Adeia Semiconductor Bonding Technologies Inc.
- Multi-metal contact structure in microelectronic assembly1 Sep 2026US 12,727,514 B2Adeia Semiconductor Bonding Technologies Inc.
- Method of assembly by direct bonding of electronic components25 Aug 2026US 12,721,248 B2Commissariat A L' Energie Atomique Et Aux Energies Alternatives
- Treatment process for wafer bonding processes8 Oct 2026US 2026/0314509 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method for manufacturing semiconductor device, and semiconductor device1 Oct 2026US 2026/0304908 A1Resonac Corporation
- Method for cleaning semiconductor chip, and method for manufacturing semiconductor device1 Oct 2026US 2026/0305220 A1
- Method for manufacturing semiconductor device1 Oct 2026US 2026/0305461 A1Resonac Corporation
- Substrate layered body producing method and substrate layered body1 Oct 2026US 2026/0305462 A1Mitsui Chemicals, Inc.
Most cited
By later US patents
- Semiconductor device and associated fabrication method309US 5,753,536 AMatsushita Electric Industrial Co., Ltd. · 1998
- Methods for hybrid wafer bonding271US 8,802,538 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2014
- Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers256US 8,809,123 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2014
- Bonding structure for stacked semiconductor devices254US 9,230,941 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Conductive barrier direct hybrid bonding254US 9,953,941 B2Invensas Bonding Technologies, Inc. · 2018