Nano-roughened interconnects for integrated circuit packages
AssigneeIntel Corporation
InventorsSuddhasattwa Nad, Gang Duan, Jeremy Ecton, Brandon Marin, Ravindranath Mahajan
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Abstract
Methods, systems, apparatus, and articles of manufacture to produce nano-roughened integrated circuit packages are disclosed. An example integrated circuit (IC) package includes a substrate, a semiconductor die, and a metal interconnect to electrically couple the semiconductor die to the substrate, the metal interconnect including a nano-roughened surface.
Claims20
An integrated circuit (IC) package comprising:
- a substrate;
- a semiconductor die;
- and
- a metal interconnect to electrically couple the semiconductor die to the substrate without solder, the metal interconnect including a nano-roughened surface along a lateral side of the metal interconnect, the nano-roughened surface spaced apart from a first end of the metal interconnect, the first end proximate the semiconductor die, the nano-roughened surface spaced apart from a second end of the metal interconnect, the second end proximate the substrate.
An integrated circuit (IC) package comprising:
- a substrate;
- a semiconductor die;
- and
- a metal interconnect to electrically couple the semiconductor die to the substrate, the metal interconnect including a nano-roughened surface, the metal interconnect being cylindrical with a central axis extending from a first end proximate the substrate to a second end proximate the semiconductor die, the nano-roughened surface to extend circumferentially around the metal interconnect.
An integrated circuit (IC) package comprising:
- a substrate;
- a semiconductor die;
- and
- a metal interconnect to electrically couple the semiconductor die to the substrate, the metal interconnect including a nano-roughened surface, the metal interconnect corresponding to a first copper bump and a second copper bump bonded together without solder, the first copper bump on the semiconductor die, the second copper bump on the substrate.
An integrated circuit (IC) package comprising:
- a substrate including a copper die pad;
- a semiconductor die including a copper bump;
- and
- a metal interconnect to electrically couple the semiconductor die to the substrate, the metal interconnect including a nano-roughened surface, the metal interconnect corresponding to a direct copper-to-copper bonding of the copper die pad and the copper bump.
An integrated circuit (IC) package comprising:
- a substrate;
- a semiconductor die;
- and
- an array of metal interconnects, the array of metal interconnects including a first metal interconnect, the first metal interconnect to electrically couple the semiconductor die to the substrate, the first metal interconnect including a nano-roughened surface, the array of metal interconnects spaced at a pitch that is 25 μm or less.
An integrated circuit (IC) package comprising:
- a package substrate including a first bump or a first pad;
- and
- a semiconductor die including a second bump or a second pad, the first bump or the first pad fixedly coupled to the second bump or the second pad by a direct copper-to-copper bond, at least one of (i) the first bump or the first pad or (ii) the second bump or the second pad including a nano-roughened surface.
Dependencies are inferred from the claim text.