H10D 30/6711
By using electrodes contacting the supplementary regions or layers
Official title: {by using electrodes contacting the supplementary regions or layers}
H10D30/6711 (By using electrodes contacting the supplementary regions or layers) appears on 396 US grants and 391 published applications in this corpus.
Search patents in H10D- Granted patents
- 396
- Published applications
- 391
- Assignees
- 112
- Inventors
- 542
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 1 | 0 |
| 1996 | 2 | 0 |
| 1997 | 2 | 0 |
| 1998 | 5 | 0 |
| 1999 | 9 | 0 |
| 2000 | 6 | 0 |
| 2001 | 14 | 9 |
| 2002 | 19 | 23 |
| 2003 | 16 | 23 |
| 2004 | 26 | 21 |
| 2005 | 16 | 25 |
| 2006 | 17 | 15 |
| 2007 | 16 | 24 |
| 2008 | 10 | 27 |
| 2009 | 14 | 12 |
| 2010 | 12 | 9 |
| 2011 | 17 | 13 |
| 2012 | 8 | 10 |
| 2013 | 12 | 4 |
| 2014 | 10 | 9 |
| 2015 | 14 | 6 |
| 2016 | 9 | 12 |
| 2017 | 17 | 21 |
| 2018 | 17 | 14 |
| 2019 | 12 | 26 |
| 2020 | 26 | 20 |
| 2021 | 11 | 13 |
| 2022 | 12 | 14 |
| 2023 | 11 | 6 |
| 2024 | 8 | 17 |
| 2025 | 13 | 10 |
| 2026 | 6 | 8 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- Body tied to source standard cell implementations in semiconductor-on-insulator (SOI) technology19 May 2026US 12,635,237 B2QUALCOMM Incorporated
- Body contact FET28 Apr 2026US 12,615,822 B2Skyworks Solutions, Inc.
- Semiconductor device13 Aug 2026US 2026/0239662 A1Minebea Power Semiconductor Device Inc.
- Transistor having an independently controlled body contact region which has a reduced length to reduce parasitic capacitance16 Jul 2026US 2026/0206282 A1QUALCOMM Incorporated
- Body contacted transistors21 May 2026US 2026/0143778 A1GLOBALFOUNDRIES U. S. Inc.
- Near-zero dibl mosfet of two channel lengths23 Apr 2026US 2026/0113993 A1Murata Manufacturing Co., Ltd.
- Approximate computing digital circuit for post-quantum cryptography applications2 Apr 2026US 2026/0093774 A1Commissariat A L' Energie Atomique Et Aux Energies Alternatives
Most cited
By later US patents
- Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility254US 5,489,792 AThe Regents of the University of California · 1996
- Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink247US 7,910,993 B2Peregrine Semiconductor Corporation · 2011
- Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility154US 5,982,003 AThe Regents of the University of California · 1999
- Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility146US 6,121,077 AThe Regents of the University of California · 2000
- Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility138US 6,300,649 B1The Regents of the University of California · 2001