Approximate computing digital circuit for post-quantum cryptography applications

A digital circuit for computing a scalar product between two N-dimension vectors, N being an integer at least equal to two, the two vectors being respectively denoted (a0, a1, . . . , aj, . . . , aN-1) and (s0, s1, . . . , sj, . . . , sN-1);

• the digital circuit including a multiplier, an accumulator including at least one adder and a register, as well as a control circuit of the accumulator;
• the digital circuit is configured to be clocked by a clock, and at a clock tick of index j, j being an integer varying between 0 and (N−1):
• the multiplier is configured to compute a result rj of a multiplication aj×sj of the components of index j of the two vectors,
• the accumulator is configured to add the result rj of the multiplication with a current value of the register, and to memorise a result of the addition in the register;
• the control circuit is configured to control the accumulator so as to perform the addition in an approximate manner, i.e. with a predetermined level of probability that the result of the addition includes an error, for at least one addition amongst the N additions of the computation of the scalar product.