MOS transistor on SOI structure

A device, comprising:

• a substrate;
• a silicon layer on the substrate;
• a source region in the silicon layer;
• a drain region in the silicon layer;
• a body region in the silicon layer and including an extension region and a body contact region in the silicon layer, the body contact region having a first surface spaced from the substrate by a first distance;
• a trench in the silicon layer adjacent to the body contact region;
• a gate region on the silicon layer and on the trench, the gate region having a second surface spaced from the substrate by a second distance, the second distance being greater than the first distance, the gate region including a gate portion laterally extending beyond the source and drain regions, body contact region not being covered with the gate region, and a region of extension of the body region being located under the gate portion, wherein the trench is under the gate portion and extends from the second face of said silicon layer down to a depth smaller than the thickness of said silicon layer, wherein the gate portion is less heavily-doped than the rest of the gate region.

An electronic device, comprising:

• a silicon layer including a first surface;
• an insulating layer in contact with the first surface of the silicon layer;
• a transistor, including:
• a source region in the silicon layer;
• a drain region in the silicon layer;
• a body region in the silicon layer and including an extension region and a body contact region;
• and
• a gate region including a gate portion laterally extending beyond the source and drain regions, wherein the body contact region is not covered by the gate region, wherein the extension region of the body region is under the gate region;
• a trench under the gate region in the silicon layer extending partially through the silicon layer, wherein the gate portion is less heavily-doped than the rest of the gate region.