G11C 2029/3202
Scan chain
Official title: {Scan chain}
G11C2029/3202 (Scan chain) appears on 298 US grants and 310 published applications in this corpus.
Search patents in G11C- Granted patents
- 298
- Published applications
- 310
- Assignees
- 113
- Inventors
- 597
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2001 | 2 | 1 |
| 2002 | 1 | 4 |
| 2003 | 9 | 10 |
| 2004 | 10 | 29 |
| 2005 | 9 | 20 |
| 2006 | 25 | 22 |
| 2007 | 23 | 25 |
| 2008 | 20 | 25 |
| 2009 | 23 | 18 |
| 2010 | 18 | 19 |
| 2011 | 27 | 8 |
| 2012 | 9 | 6 |
| 2013 | 5 | 1 |
| 2014 | 4 | 3 |
| 2015 | 5 | 4 |
| 2016 | 3 | 6 |
| 2017 | 8 | 5 |
| 2018 | 8 | 12 |
| 2019 | 11 | 9 |
| 2020 | 15 | 9 |
| 2021 | 9 | 20 |
| 2022 | 17 | 11 |
| 2023 | 9 | 10 |
| 2024 | 11 | 13 |
| 2025 | 6 | 10 |
| 2026 | 11 | 10 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Scannable SRAM29 Sep 2026US 12,749,528 B2SambaNova Systems, Inc.
- Fully scannable memory arrays4 Aug 2026US 12,700,471 B2SambaNova Systems, Inc.
- Triple via chain for advanced interconnect in a memory device28 Jul 2026US 12,694,939 B2Micron Technology, Inc.
- Scannable memory subsystem14 Jul 2026US 12,682,973 B2SambaNova Systems, Inc.
- Hybrid scan chains with flip-flops and latches14 Jul 2026US 12,682,974 B2SambaNova Systems, Inc.
- Memory Array Column Configured as a Monolithic Unit Within an Integrated Circuit Scan Chain24 Sep 2026US 2026/0290483 A1SambaNova Systems, Inc.
- Scan Clocking30 Jul 2026US 2026/0221210 A1Texas Instruments Incorporated
- Scan-path integrated circuit memory with output bus feedback9 Jul 2026US 2026/0196286 A1SambaNova Systems, Inc.
- Memory with Enhanced Design-for-Test Bypass Mode25 Jun 2026US 2026/0179709 A1QUALCOMM Incorporated
- Repair Sharing In Serial Repair Interfaces25 Jun 2026US 2026/0179710 A1Google Inc.
Most cited
By later US patents
- Apparatus and method for programmable built-in self-test and self-repair of embedded memory98US 6,560,740 B1Advanced Micro Devices, Inc. · 2003
- Probeless testing of pad buffers on wafer80US 6,199,182 B1Texas Instruments Incorporated · 2001
- Reconfigurable connections for stacked semiconductor devices69US 8,134,378 B2Micron Technology, Inc. · 2012
- Method for reducing stored patterns for IC test by embedding built-in-self-test circuitry for chip logic into a scan test access port51US 6,715,105 B1Agilent Technologies, Inc. · 2004
- Compressing test responses using a compactor50US 7,370,254 B22008