Scannable SRAM
AssigneeSambaNova Systems, Inc.
InventorsPaul Jordan, Thomas Ziaja
Life of this patent
Estimating the term…
Abstract
A scannable memory cell includes an amplifier configured in a positive feedback loop, with the amplifier output coupled to the scan output SO terminal. The memory cell further has a data access switch coupled between the amplifier output and the bit line BL terminal, and a scan access switch coupled between the amplifier input and the scan input SI terminal. Control terminals of both switches are coupled to the word line WL and scan control SC line terminals, respectively. Some implementations further include a scan loop switch, controlled by the scan control SC terminal, and configured to interrupt the positive feedback loop when the memory cell is in scan mode. Other implementations include a scan out SO buffer or inverter with increased drive strength.
Claims9
A scannable memory cell, with a bit line BL terminal, a word line WL terminal, a scan control line SC terminal, a scan input SI terminal, and a scan output SO terminal, the scannable memory cell comprising:
- an amplifier with an amplifier input and a first amplifier output, configured in a positive feedback loop, and wherein the first amplifier output or a second amplifier output is coupled with the scan output SO terminal;
- a first data access switch coupled between the first amplifier output and the bit line BL terminal, and with a control terminal coupled with the word line WL terminal;
- a first scan access switch coupled between the amplifier input and the scan input SI terminal, and with a control terminal coupled with the scan control line SC terminal;
- and
- a first scan loop switch coupled in the positive feedback loop between the amplifier input and the first amplifier output, and having a control terminal coupled with the scan control line SC terminal.
A method of using a scannable memory cell, the scannable memory cell including a buffer, a data access switch controlled by a word line WL, a scan access switch controlled by a scan control line SC and coupled between an input of the buffer and a scan input SI, and a scan loop switch controlled by the scan control line SC and coupled between an output of the buffer and the input of the buffer, the method comprising:
- determining a mode from a signal on the scan control line SC and a signal on the word line WL;
- upon determining that the mode is a data access mode, asserting the data access switch to couple the buffer with a bit line BL;
- upon determining that the mode is not a data access mode, de-asserting the data access switch to decouple the buffer from the bit line BL;
- upon determining that the mode is a scan mode, asserting the scan access switch to couple the input of the buffer with the scan input source SI and interrupting a positive feedback loop to decouple a buffer input from a buffer output;
- and
- upon determining that the mode is not a scan mode, de-asserting the scan access switch to decouple the input of the buffer from the scan input source SI and restoring the positive feedback loop to couple the buffer input to the buffer output.
Dependencies are inferred from the claim text.