G11C 29/18
Address generation devices
Official title: Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
G11C29/18 (Address generation devices) appears on 3,338 US grants and 2,788 published applications in this corpus.
Search patents in G11C- Granted patents
- 3,338
- Published applications
- 2,788
- Assignees
- 498
- Inventors
- 5,161
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 4 | 0 |
| 1978 | 2 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 9 | 0 |
| 1983 | 3 | 0 |
| 1984 | 9 | 0 |
| 1985 | 7 | 0 |
| 1986 | 7 | 0 |
| 1987 | 9 | 0 |
| 1988 | 21 | 0 |
| 1989 | 20 | 0 |
| 1990 | 14 | 0 |
| 1991 | 19 | 0 |
| 1992 | 16 | 0 |
| 1993 | 35 | 0 |
| 1994 | 37 | 0 |
| 1995 | 59 | 0 |
| 1996 | 63 | 0 |
| 1997 | 72 | 0 |
| 1998 | 90 | 0 |
| 1999 | 122 | 0 |
| 2000 | 72 | 0 |
| 2001 | 66 | 21 |
| 2002 | 76 | 63 |
| 2003 | 89 | 99 |
| 2004 | 79 | 132 |
| 2005 | 66 | 112 |
| 2006 | 112 | 112 |
| 2007 | 112 | 111 |
| 2008 | 108 | 126 |
| 2009 | 105 | 103 |
| 2010 | 91 | 69 |
| 2011 | 106 | 54 |
| 2012 | 73 | 73 |
| 2013 | 76 | 83 |
| 2014 | 83 | 74 |
| 2015 | 72 | 99 |
| 2016 | 96 | 80 |
| 2017 | 114 | 86 |
| 2018 | 90 | 100 |
| 2019 | 98 | 116 |
| 2020 | 134 | 135 |
| 2021 | 138 | 176 |
| 2022 | 157 | 193 |
| 2023 | 182 | 166 |
| 2024 | 144 | 126 |
| 2025 | 101 | 107 |
| 2026 | 76 | 172 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
- G11C 29/30Accessing single arrays1,110
- G11C 29/26Accessing multiple arrays1,006
- G11C 29/24Accessing extra cells699
- G11C 29/20Using counters or linear-feedback shift registers [lfsr]313
- G11C 2029/1802Address decoderIndexing code157
- G11C 2029/1806Address conversion or mapping, i.e. logical to physical addressIndexing code99
- G11C 2029/1804Manipulation of word sizeIndexing code39
- G11C 29/22Accessing serial memories17
Recent patents
- Memory device including error logging device and operating methods thereof6 Oct 2026US 12,755,805 B2SK hynix Inc.
- Logging a memory address associated with faulty usage-based disturbance data6 Oct 2026US 12,755,806 B2Micron Technology, Inc.
- Scannable SRAM29 Sep 2026US 12,749,528 B2SambaNova Systems, Inc.
- Semiconductor system for detecting fail location29 Sep 2026US 12,749,551 B2SK hynix Inc.
- Method, system and computer program product for memory repair22 Sep 2026US 12,744,103 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Memory device and operating method thereof1 Oct 2026US 2026/0300109 A1Samsung Electronics Co., Ltd.
- Memory Array Column Configured as a Monolithic Unit Within an Integrated Circuit Scan Chain24 Sep 2026US 2026/0290483 A1SambaNova Systems, Inc.
- Method and architecture for efficient delay decoder test of memories17 Sep 2026US 2026/0279479 A1STMicroelectronics International N. V.
- Parallel operations in compute systems17 Sep 2026US 2026/0279480 A1OpenAI OpCo, LLC
- Electronic device smart ram built in self test10 Sep 2026US 2026/0268995 A1
Most cited
By later US patents
- Memory management system and method627US 8,200,887 B2Violin Memory, Inc. · 2012
- Flash eeprom system602US 5,297,148 ASunDisk Corporation · 1994
- Memory management system and method590US 9,189,334 B2Violin Memory, Inc. · 2015
- Memory management system and method586US 9,081,713 B1Violin Memory, Inc. · 2015
- Memory management system and method585US 9,311,182 B2Violin Memory, Inc. · 2016