Logging a memory address associated with faulty usage-based disturbance data
AssigneeMicron Technology, Inc.
InventorsYang Lu, Mark Kalei Hadrick, Kang-Yong Kim, Donald Morgan, Victor Wong
Life of this patent
Estimating the term…
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AssigneeMicron Technology, Inc.
InventorsYang Lu, Mark Kalei Hadrick, Kang-Yong Kim, Donald Morgan, Victor Wong
Estimating the term…
Apparatuses and techniques for logging a memory address associated with faulty usage-based disturbance data are described. In an example aspect, a memory device can detect, at a local-bank level, a fault associated with usage-based disturbance data. This detection enables the memory device to log a row address associated with the faulty usage-based disturbance data. To avoid increasing a complexity and/or a size of the memory device, some implementations of the memory device can perform the address logging at the multi-bank level with the assistance of an engine, such as a test engine. The memory device stores the logged address in at least one mode register to communicate the fault to a memory controller. With the logged address, the memory controller can initiate a repair procedure to fix the faulty usage-based disturbance data.
An apparatus comprising:
A method performed by a memory device, the method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.