G11C 16/0475
Comprising two or more independent storage sites which store independent data
Official title: {comprising two or more independent storage sites which store independent data}
G11C16/0475 (Comprising two or more independent storage sites which store independent data) appears on 833 US grants and 774 published applications in this corpus.
Search patents in G11C- Granted patents
- 833
- Published applications
- 774
- Assignees
- 173
- Inventors
- 803
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 0 | 0 |
| 1997 | 2 | 0 |
| 1998 | 8 | 0 |
| 1999 | 8 | 0 |
| 2000 | 12 | 0 |
| 2001 | 26 | 6 |
| 2002 | 41 | 37 |
| 2003 | 60 | 85 |
| 2004 | 68 | 61 |
| 2005 | 69 | 67 |
| 2006 | 69 | 101 |
| 2007 | 70 | 89 |
| 2008 | 66 | 65 |
| 2009 | 62 | 46 |
| 2010 | 49 | 42 |
| 2011 | 43 | 20 |
| 2012 | 32 | 17 |
| 2013 | 14 | 8 |
| 2014 | 15 | 16 |
| 2015 | 16 | 7 |
| 2016 | 17 | 15 |
| 2017 | 11 | 11 |
| 2018 | 12 | 9 |
| 2019 | 12 | 20 |
| 2020 | 15 | 7 |
| 2021 | 8 | 9 |
| 2022 | 4 | 6 |
| 2023 | 6 | 6 |
| 2024 | 7 | 9 |
| 2025 | 4 | 7 |
| 2026 | 3 | 8 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Multi-level memristor elements25 Aug 2026US 12,720,766 B2Cirrus Logic, Inc.
- Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory2 Jun 2026US 12,646,570 B2Silicon Motion, Inc.
- Method to produce a 3D multilayer semiconductor device and structure19 May 2026US 12,635,163 B2Monolithic 3D Inc.
- 3D semiconductor devices and structures with slits18 Nov 2025US 12,475,952 B2Monolithic 3D Inc.
- Method to produce a 3D multilayer semiconductor device and structure30 Sep 2025US 12,432,926 B2Monolithic 3D Inc.
- Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory17 Sep 2026US 2026/0279460 A1Silicon Motion, Inc.
- Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory17 Sep 2026US 2026/0279461 A1Silicon Motion, Inc.
- Non-volatile memory and corresponding manufacturing method13 Aug 2026US 2026/0237437 A1STMicroelectronics International N. V.
- Charge storage type tunneling transistor device, manufacturing method thereof, and boolean logic operation method25 Jun 2026US 2026/0181965 A1Seoul National University R&Db Foundation
- Non-volatile memory device and method of fabricating non-volatile memory cell30 Apr 2026US 2026/0122898 A1eMemory Technology Inc.
Most cited
By later US patents
- Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping1,211US 6,011,725 ASaifun Semiconductors Ltd. · 2000
- Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping1,069US 5,768,192 ASaifun Semiconductors Ltd. · 1998
- Nonvolatile semiconductor memory device capable of uniformly inputting/outputting data419US 7,173,857 B2Renesas Technology Corp. · 2007
- Multigate semiconductor device with vertical channel current and method of fabrication396US 6,580,124 B1Matrix Semiconductor, Inc. · 2003
- Multigate semiconductor device with vertical channel current and method of fabrication307US 6,677,204 B2Matrix Semiconductor, Inc. · 2004