G11C 16/04
Using variable threshold transistors
Official title: using variable threshold transistors, e.g. FAMOS
G11C16/04 (Using variable threshold transistors) appears on 19,072 US grants and 19,439 published applications in this corpus.
Search patents in G11C- Granted patents
- 19,072
- Published applications
- 19,439
- Assignees
- 1,077
- Inventors
- 12,603
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 12 | 0 |
| 1977 | 19 | 0 |
| 1978 | 36 | 0 |
| 1979 | 18 | 0 |
| 1980 | 16 | 0 |
| 1981 | 23 | 0 |
| 1982 | 22 | 0 |
| 1983 | 28 | 0 |
| 1984 | 24 | 0 |
| 1985 | 19 | 0 |
| 1986 | 17 | 0 |
| 1987 | 16 | 0 |
| 1988 | 22 | 0 |
| 1989 | 32 | 0 |
| 1990 | 34 | 0 |
| 1991 | 42 | 0 |
| 1992 | 43 | 0 |
| 1993 | 45 | 0 |
| 1994 | 81 | 0 |
| 1995 | 78 | 0 |
| 1996 | 97 | 0 |
| 1997 | 130 | 0 |
| 1998 | 175 | 0 |
| 1999 | 189 | 0 |
| 2000 | 225 | 0 |
| 2001 | 237 | 73 |
| 2002 | 236 | 252 |
| 2003 | 302 | 309 |
| 2004 | 307 | 386 |
| 2005 | 332 | 558 |
| 2006 | 425 | 675 |
| 2007 | 523 | 694 |
| 2008 | 531 | 715 |
| 2009 | 599 | 656 |
| 2010 | 602 | 599 |
| 2011 | 605 | 672 |
| 2012 | 601 | 687 |
| 2013 | 678 | 655 |
| 2014 | 808 | 709 |
| 2015 | 783 | 673 |
| 2016 | 871 | 724 |
| 2017 | 765 | 656 |
| 2018 | 652 | 659 |
| 2019 | 848 | 1013 |
| 2020 | 1071 | 1130 |
| 2021 | 1043 | 1153 |
| 2022 | 1038 | 1259 |
| 2023 | 999 | 1326 |
| 2024 | 1104 | 1283 |
| 2025 | 1008 | 1045 |
| 2026 | 661 | 878 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Low-power programmable erasable nonvolatile memory6 Oct 2026US 12,755,787 B2Yield Microelectronics Corp.
- Address fault detection in a memory system6 Oct 2026US 12,755,788 B2Silicon Storage Technology, Inc.
- Control gate signal for data retention in nonvolatile memory6 Oct 2026US 12,755,789 B2SanDisk Technologies LLC
- Re-driving data to a sub-block during programming of multiple sub-blocks6 Oct 2026US 12,755,791 B2Micron Technology, Inc.
- Using non-segregated cells as drain-side select gates for sub-blocks in a memory device6 Oct 2026US 12,755,792 B2Micron Technology, Inc.
- Nonvolatile memory device supporting high-efficiency i/o interface8 Oct 2026US 2026/0310383 A1Samsung Electronics Co., Ltd.
- Fabrication Method for a Memory Structure Including High Density Three-Dimensional NOR Memory Strings of Junctionless Ferroelectric Storage Transistors8 Oct 2026US 2026/0311761 A1Sunrise Memory Corporation
- Memory apparatus8 Oct 2026US 2026/0311762 A1Winbond Electronics Corp.
- Bias voltage control for sub-block groups in a memory device8 Oct 2026US 2026/0311766 A1Micron Technology, Inc.
- Nonvolatile memory device and method of operating the same8 Oct 2026US 2026/0311769 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping1,211US 6,011,725 ASaifun Semiconductors Ltd. · 2000
- Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping1,069US 5,768,192 ASaifun Semiconductors Ltd. · 1998
- Multi-state memory1,008US 6,222,762 B1SanDisk Corporation · 2001
- Multi-state EEPROM having write-verify control circuit972US 5,570,315 AKabushiki Kaisha Toshiba · 1996
- Semiconductor device and memory system940US 6,046,935 AKabushiki Kaisha Toshiba · 2000