H10W 90/701
Package configurations: characterised by the relative positions of pads or connectors relative
Official title: {characterised by the relative positions of pads or connectors relative to package parts}
H10W90/701 (Package configurations: characterised by the relative positions of pads or connectors relative) appears on 79,091 US grants and 92,862 published applications in this corpus.
Search patents in H10W- Granted patents
- 79,091
- Published applications
- 92,862
- Assignees
- 6,406
- Inventors
- 75,958
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 35 | 0 |
| 1977 | 42 | 0 |
| 1978 | 40 | 0 |
| 1979 | 27 | 0 |
| 1980 | 35 | 0 |
| 1981 | 35 | 0 |
| 1982 | 38 | 0 |
| 1983 | 48 | 0 |
| 1984 | 55 | 0 |
| 1985 | 83 | 0 |
| 1986 | 78 | 0 |
| 1987 | 110 | 0 |
| 1988 | 120 | 0 |
| 1989 | 184 | 0 |
| 1990 | 204 | 0 |
| 1991 | 287 | 0 |
| 1992 | 316 | 0 |
| 1993 | 330 | 0 |
| 1994 | 440 | 0 |
| 1995 | 460 | 0 |
| 1996 | 512 | 0 |
| 1997 | 573 | 0 |
| 1998 | 862 | 0 |
| 1999 | 984 | 0 |
| 2000 | 1071 | 0 |
| 2001 | 1359 | 688 |
| 2002 | 1564 | 2013 |
| 2003 | 1729 | 2028 |
| 2004 | 1771 | 2389 |
| 2005 | 1669 | 2798 |
| 2006 | 1810 | 2791 |
| 2007 | 1825 | 3072 |
| 2008 | 1643 | 3306 |
| 2009 | 1794 | 3286 |
| 2010 | 2623 | 3242 |
| 2011 | 2808 | 3355 |
| 2012 | 2853 | 3686 |
| 2013 | 3184 | 3691 |
| 2014 | 3512 | 4045 |
| 2015 | 3743 | 4262 |
| 2016 | 3854 | 3867 |
| 2017 | 3949 | 3855 |
| 2018 | 3529 | 3663 |
| 2019 | 3666 | 3958 |
| 2020 | 3622 | 4594 |
| 2021 | 3422 | 4509 |
| 2022 | 3502 | 4654 |
| 2023 | 3519 | 4557 |
| 2024 | 3358 | 5339 |
| 2025 | 3335 | 5348 |
| 2026 | 2479 | 3866 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor relay and electric circuit comprising same6 Oct 2026US 12,756,394 B2Panasonic Intellectual Property Management Co., Ltd.
- Semiconductor storage device6 Oct 2026US 12,757,341 B2Kioxia Corporation
- Semiconductor package structure having a chip stack6 Oct 2026US 12,757,412 B2Changxin Memory Technologies, Inc.
- Semiconductor memory device6 Oct 2026US 12,757,413 B2Samsung Electronics Co., Ltd.
- Bondable pillars for wire bonds in a semiconductor package6 Oct 2026US 12,757,414 B2Micron Technology, Inc.
- Interconnect structure and method of forming same8 Oct 2026US 2026/0306859 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor package manufacturing methods using hybrid die bonding with spin-on siloxane materials8 Oct 2026US 2026/0308432 A1
- Semiconductor devices configured for repairing defective bumps8 Oct 2026US 2026/0309777 A1SK hynix Inc.
- Wiring substrate8 Oct 2026US 2026/0309912 A1Ibiden Co., Ltd.
- Electronic package and manufacturing method thereof8 Oct 2026US 2026/0309937 A1Siliconware Precision Industries Co., Ltd.
Most cited
By later US patents
- Methods of forming integrated circuit package1,886US 9,281,254 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Testing of semiconductor chips with microbumps1,870US 9,372,206 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Stacked semiconductor devices and methods of forming same1,870US 9,496,189 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Non-protruding optoelectronic lens1,266US 6,525,386 B1Masimo Corporation · 2003
- Method of fabricating interconnect structure for package-on-package devices1,078US 9,048,222 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015