H10W 80/721
Having structure or size changed during the connecting
Official title: {having structure or size changed during the connecting}
H10W80/721 (Having structure or size changed during the connecting) appears on 201 US grants and 303 published applications in this corpus.
Search patents in H10W- Granted patents
- 201
- Published applications
- 303
- Assignees
- 87
- Inventors
- 498
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2008 | 0 | 1 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 3 |
| 2012 | 1 | 7 |
| 2013 | 3 | 5 |
| 2014 | 7 | 11 |
| 2015 | 10 | 19 |
| 2016 | 11 | 9 |
| 2017 | 11 | 16 |
| 2018 | 11 | 14 |
| 2019 | 11 | 9 |
| 2020 | 10 | 15 |
| 2021 | 11 | 15 |
| 2022 | 10 | 22 |
| 2023 | 19 | 52 |
| 2024 | 19 | 51 |
| 2025 | 28 | 33 |
| 2026 | 39 | 21 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Semiconductor package and manufacturing method thereof6 Oct 2026US 12,757,764 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Package structure with wettable side surface and manufacturing method thereof, and vertical package module6 Oct 2026US 12,757,784 B2Zhuhai ACCESS Semiconductor Co., Ltd.
- Semiconductor chip, semiconductor device, and semiconductor package including the same29 Sep 2026US 12,751,331 B2Samsung Electronics Co., Ltd.
- Memory device and method of assembling same22 Sep 2026US 12,745,632 B2SanDisk Technologies LLC
- Semiconductor package with reduced adhesive fillets22 Sep 2026US 12,745,680 B2Samsung Electronics Co., Ltd.
- Semiconductor devices having aligned front-end interface contacts and back-end interface contacts, and associated systems and methods8 Oct 2026US 2026/0314488 A1Micron Technology, Inc.
- Semiconductor package and method of manufacturing the semiconductor package1 Oct 2026US 2026/0305403 A1Samsung Electronics Co., Ltd.
- Wafer-on-wafer formed memory and logic17 Sep 2026US 2026/0279433 A1Micron Technology, Inc.
- Semiconductor module10 Sep 2026US 2026/0271787 A1Fuji Electric Co., Ltd.
- Hybrid bonding structure, manufacturing method therefor, and semiconductor device27 Aug 2026US 2026/0256012 A1CXMT Corporation
Most cited
By later US patents
- Hybrid bond using a copper alloy for yield improvement249US 9,728,521 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Hybrid bonding with air-gap structure246US 9,312,229 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Hybrid bonding with air-gap structure242US 9,960,142 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2018
- Air trench in packages incorporating hybrid bonding239US 9,443,796 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures and intermediate structures formed using such methods238US 8,716,105 B2Soitec · 2014