H10W 70/63
Vias
Official title: Vias, e.g. via plugs
H10W70/63 (Vias) appears on 14,891 US grants and 17,994 published applications in this corpus.
Search patents in H10W- Granted patents
- 14,891
- Published applications
- 17,994
- Assignees
- 1,670
- Inventors
- 17,557
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 3 | 0 |
| 1978 | 5 | 0 |
| 1979 | 1 | 0 |
| 1980 | 5 | 0 |
| 1981 | 2 | 0 |
| 1982 | 8 | 0 |
| 1983 | 7 | 0 |
| 1984 | 9 | 0 |
| 1985 | 9 | 0 |
| 1986 | 9 | 0 |
| 1987 | 13 | 0 |
| 1988 | 14 | 0 |
| 1989 | 25 | 0 |
| 1990 | 33 | 0 |
| 1991 | 41 | 0 |
| 1992 | 42 | 0 |
| 1993 | 51 | 0 |
| 1994 | 54 | 0 |
| 1995 | 50 | 0 |
| 1996 | 47 | 0 |
| 1997 | 77 | 0 |
| 1998 | 109 | 0 |
| 1999 | 110 | 0 |
| 2000 | 112 | 0 |
| 2001 | 153 | 88 |
| 2002 | 169 | 200 |
| 2003 | 173 | 186 |
| 2004 | 164 | 229 |
| 2005 | 165 | 263 |
| 2006 | 200 | 298 |
| 2007 | 151 | 332 |
| 2008 | 170 | 301 |
| 2009 | 189 | 303 |
| 2010 | 253 | 360 |
| 2011 | 285 | 440 |
| 2012 | 371 | 521 |
| 2013 | 427 | 663 |
| 2014 | 578 | 853 |
| 2015 | 749 | 906 |
| 2016 | 882 | 977 |
| 2017 | 982 | 992 |
| 2018 | 937 | 982 |
| 2019 | 986 | 1217 |
| 2020 | 1034 | 1228 |
| 2021 | 933 | 1205 |
| 2022 | 943 | 1205 |
| 2023 | 987 | 1098 |
| 2024 | 905 | 1193 |
| 2025 | 809 | 1185 |
| 2026 | 457 | 769 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Single layer and multilayer magnetic inductors between substrate cores6 Oct 2026US 12,757,740 B2Intel Corporation
- Semiconductor structure and alignment method thereof6 Oct 2026US 12,757,744 B2United Microelectronics Corp.
- Aligned via and trace formation using multi-tone phoitomasks and multi-layer photosensitive stacks6 Oct 2026US 12,757,748 B2Intel Corporation
- Semiconductor packages, semiconductor device and method for manufacturing a semiconductor package6 Oct 2026US 12,757,765 B2Seriphy Technology Corporation
- Circuit board and semiconductor package comprising same6 Oct 2026US 12,757,775 B2LG Innotek Co., Ltd.
- Wiring substrate8 Oct 2026US 2026/0309912 A1Ibiden Co., Ltd.
- Stepped trace design for impedance compensation of high-speed differential pair channels8 Oct 2026US 2026/0313784 A1Advanced Micro Devices, Inc.
- Semiconductor device structure and manufacturing method thereof8 Oct 2026US 2026/0314277 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Electronic component and apparatus8 Oct 2026US 2026/0314402 A1
- Circuit board and semiconductor package substrate comprising same8 Oct 2026US 2026/0314444 A1LG Innotek Co., Ltd.
Most cited
By later US patents
- Method of fabricating interconnect structure for package-on-package devices1,078US 9,048,222 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Package systems having interposers1,064US 9,048,233 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- 3D packages and methods for forming the same974US 9,299,649 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Structure and method for 3D IC package971US 8,993,380 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Packaging methods and structures using a die attach film854US 9,064,879 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015