H10W 70/60
Insulating or insulated package substrates
Official title: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
H10W70/60 (Insulating or insulated package substrates) appears on 49,288 US grants and 57,296 published applications in this corpus.
Search patents in H10W- Granted patents
- 49,288
- Published applications
- 57,296
- Assignees
- 4,571
- Inventors
- 50,825
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 29 | 0 |
| 1977 | 29 | 0 |
| 1978 | 30 | 0 |
| 1979 | 24 | 0 |
| 1980 | 33 | 0 |
| 1981 | 38 | 0 |
| 1982 | 44 | 0 |
| 1983 | 54 | 0 |
| 1984 | 55 | 0 |
| 1985 | 82 | 0 |
| 1986 | 80 | 0 |
| 1987 | 132 | 0 |
| 1988 | 140 | 0 |
| 1989 | 163 | 0 |
| 1990 | 181 | 0 |
| 1991 | 256 | 0 |
| 1992 | 260 | 0 |
| 1993 | 241 | 0 |
| 1994 | 307 | 0 |
| 1995 | 307 | 0 |
| 1996 | 339 | 0 |
| 1997 | 400 | 0 |
| 1998 | 538 | 0 |
| 1999 | 577 | 0 |
| 2000 | 657 | 0 |
| 2001 | 796 | 416 |
| 2002 | 940 | 1109 |
| 2003 | 961 | 1113 |
| 2004 | 1021 | 1332 |
| 2005 | 897 | 1489 |
| 2006 | 1002 | 1492 |
| 2007 | 992 | 1637 |
| 2008 | 907 | 1671 |
| 2009 | 973 | 1640 |
| 2010 | 1346 | 1606 |
| 2011 | 1378 | 1586 |
| 2012 | 1455 | 1720 |
| 2013 | 1542 | 1853 |
| 2014 | 1778 | 2180 |
| 2015 | 1989 | 2376 |
| 2016 | 2240 | 2322 |
| 2017 | 2359 | 2404 |
| 2018 | 2225 | 2472 |
| 2019 | 2454 | 2910 |
| 2020 | 2532 | 3361 |
| 2021 | 2484 | 3271 |
| 2022 | 2552 | 3460 |
| 2023 | 2577 | 3466 |
| 2024 | 2560 | 3960 |
| 2025 | 2551 | 3807 |
| 2026 | 1781 | 2643 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Method of manufacturing a redistribution layer, redistribution layer, integrated circuit and methods for electrically testing and protecting the integrated circuit6 Oct 2026US 12,753,493 B2STMicroelectronics S,r.l.
- Integrated circuit package and method of manufacturing the same6 Oct 2026US 12,754,862 B2SK hynix Inc.
- Semiconductor package structure having a chip stack6 Oct 2026US 12,757,412 B2Changxin Memory Technologies, Inc.
- Display device and method for manufacturing the same6 Oct 2026US 12,757,532 B2LG Display Co., Ltd.
- Package structure and manufacturing method thereof6 Oct 2026US 12,757,706 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Wiring substrate8 Oct 2026US 2026/0309912 A1Ibiden Co., Ltd.
- Stepped trace design for impedance compensation of high-speed differential pair channels8 Oct 2026US 2026/0313784 A1Advanced Micro Devices, Inc.
- Package structure and method for forming the same8 Oct 2026US 2026/0313918 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Concentric dtc bumps for high density package decap solution8 Oct 2026US 2026/0313924 A1QUALCOMM Incorporated
- Semiconductor device structure and manufacturing method thereof8 Oct 2026US 2026/0314277 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Testing of semiconductor chips with microbumps1,870US 9,372,206 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Stacked semiconductor devices and methods of forming same1,870US 9,496,189 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Method of fabricating interconnect structure for package-on-package devices1,078US 9,048,222 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Package systems having interposers1,064US 9,048,233 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Methods and apparatus of wafer level package for heterogeneous integration technology1,051US 9,111,949 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015