Integrated circuit package and method of manufacturing the same
AssigneeSK hynix Inc.
InventorSeong Ju Lee
Life of this patent
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Abstract
An integrated circuit package may include a base die, a host device, a first bonding interface, a stacked memory structure, and a second bonding interface. The base die may include a first surface and a second surface. The host device may be disposed on the first surface of the base die. The first bonding interface may be located between the first surface of the base die and the host device. The stacked memory structure may be disposed on the first surface of the base die. The second bonding interface may be located between the first surface of the base die and the stacked memory structure.
Claims28
An integrated circuit package comprising:
- a base die including a first surface and a second surface;
- a host device disposed on the first surface of the base die;
- a first hybrid bonding surface located between the first surface of the base die and the host device;
- a stacked memory structure disposed on the first surface of the base die;
- and
- a second hybrid bonding surface located between the first surface of the base die and the stacked memory structure,
- wherein the base die includes at least one circuit block to transmit data between the host device and the stacked memory structure.
An integrated circuit package comprising:
- a package substrate;
- a base die structure mounted on the package substrate;
- at least one host device disposed on the base die structure, the base die structure comprising a plurality of base dies, and each of the plurality of base dies including a first circuit block;
- a plurality of stacked memory structures disposed on the base die structure;
- at least one first hybrid bonding surface located between the base die structure and the host device;
- and
- a plurality of second hybrid bonding surfaces located between the base die structure and the plurality of stacked memory structures, respectively.
A method of manufacturing an integrated circuit package, comprising:
- hybrid bonding at least one stacked memory structure onto an upper surface of a base die;
- and
- hybrid bonding a host device onto the upper surface of the base die,
- wherein the base die comprises at least one circuit block, and the host device and the stacked memory structure transmit data to each other through the base die.
A method of manufacturing an integrated circuit package, comprising:
- providing a base die structure comprising a plurality of base dies, each of the base dies including at least one circuit block;
- hybrid bonding a plurality of stacked memory structures and a host device onto an upper surface of the base die structure;
- and
- mounting the base die structure on a package substrate,
- wherein the host device and the plurality of stacked memory structures transmit data to each other through the at least one circuit block of the base dies.
Dependencies are inferred from the claim text.