3D packages and methods for forming the same

A semiconductor device comprising:

• an interconnecting structure, the interconnecting structure comprising:
• a first metal line disposed in a first dielectric layer, the first metal line having an upper surface substantially coplanar with an upper surface of the first dielectric layer, the upper surface of the first metal line being a first side of the interconnecting structure;
• a second metal line disposed in a second dielectric layer, the second metal line having a lower surface substantially coplanar with a lower surface of the second dielectric layer, the lower surface of the second metal line being a second side of the interconnecting structure, the first metal line and the second metal line being substantially aligned;
• and
• a set of metal lines disposed in a region extending from the first metal line to the second metal line, each of the set of metal lines disposed in a respective dielectric layer;
• a first passivation layer on the first side of the interconnecting structure, the first passivation layer having a substantially planar surface, the substantially planar surface of the first passivation layer directly adjoining the first metal line and the first dielectric layer;
• a second passivation layer on the second side of the interconnecting structure, the second passivation layer having a substantially planar surface, the substantially planar surface of the second passivation layer directly adjoining the second metal line and the second dielectric layer;
• a first connector extending through the first passivation layer and contacting the first metal line;
• a die comprising an active surface and a backside surface opposite the active surface, the active surface comprising a second connector, the second connector being electrically coupled to the first connector, the active surface being substantially parallel to the upper surface of the first metal line and the upper surface of the second metal line;
• and
• a third connector extending through the second passivation layer and contacting the second metal line, the first connector and the third connector being substantially aligned.

A semiconductor device comprising:

• an interconnecting structure consisting of a plurality of thin film layers and a plurality of metal layers disposed therein, the interconnecting structure having a first side and a second side, the first side comprising a first metal layer of the plurality of metal layers and a first thin film layer of the plurality of thin film layers, the first metal layer having an upper surface substantially coplanar with an upper surface of the first thin film layer, the second side comprising a second metal layer of the plurality of metal layers and a second thin film layer of the plurality of thin film layers, the second metal layer having a lower surface substantially coplanar with a lower surface of the second thin film layer, the interconnecting structure being free from active and passive devices;
• a die comprising an active surface and a backside surface opposite the active surface, the active surface being directly coupled to the first side of the interconnecting structure;
• and
• a first connector directly coupled to the second side of the interconnecting structure, the second side being opposite the first side.