H10W 70/095
Of vias therein
Official title: {of vias therein}
H10W70/095 (Of vias therein) appears on 4,971 US grants and 6,203 published applications in this corpus.
Search patents in H10W- Granted patents
- 4,971
- Published applications
- 6,203
- Assignees
- 812
- Inventors
- 7,158
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 2 | 0 |
| 1983 | 3 | 0 |
| 1984 | 2 | 0 |
| 1985 | 6 | 0 |
| 1986 | 5 | 0 |
| 1987 | 3 | 0 |
| 1988 | 3 | 0 |
| 1989 | 8 | 0 |
| 1990 | 10 | 0 |
| 1991 | 13 | 0 |
| 1992 | 22 | 0 |
| 1993 | 24 | 0 |
| 1994 | 29 | 0 |
| 1995 | 17 | 0 |
| 1996 | 19 | 0 |
| 1997 | 37 | 0 |
| 1998 | 33 | 0 |
| 1999 | 34 | 0 |
| 2000 | 37 | 0 |
| 2001 | 36 | 14 |
| 2002 | 42 | 48 |
| 2003 | 43 | 37 |
| 2004 | 37 | 57 |
| 2005 | 23 | 54 |
| 2006 | 45 | 76 |
| 2007 | 43 | 64 |
| 2008 | 42 | 84 |
| 2009 | 44 | 74 |
| 2010 | 68 | 106 |
| 2011 | 80 | 131 |
| 2012 | 108 | 153 |
| 2013 | 109 | 152 |
| 2014 | 123 | 203 |
| 2015 | 194 | 273 |
| 2016 | 287 | 371 |
| 2017 | 378 | 463 |
| 2018 | 406 | 415 |
| 2019 | 417 | 483 |
| 2020 | 353 | 415 |
| 2021 | 327 | 376 |
| 2022 | 305 | 390 |
| 2023 | 317 | 420 |
| 2024 | 313 | 498 |
| 2025 | 321 | 447 |
| 2026 | 197 | 399 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Package structure and manufacturing method thereof6 Oct 2026US 12,757,706 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Package substrate with open air gap structures6 Oct 2026US 12,757,739 B2Intel Corporation
- Aligned via and trace formation using multi-tone phoitomasks and multi-layer photosensitive stacks6 Oct 2026US 12,757,748 B2Intel Corporation
- Asymmetrical dielectric-to-metal adhesion architecture for electronic packages6 Oct 2026US 12,757,760 B2Intel Corporation
- Semiconductor packages, semiconductor device and method for manufacturing a semiconductor package6 Oct 2026US 12,757,765 B2Seriphy Technology Corporation
- Integrated circuit packages and methods of forming the same8 Oct 2026US 2026/0314429 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Capacitor integrated passive device with common grounded through-substrate-via and substrate backside conductor and methods of forming the same8 Oct 2026US 2026/0314447 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated circuit device and method of fabrication8 Oct 2026US 2026/0314449 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Interposer via interconnect shapes with improved performance characteristics and methods of forming the same8 Oct 2026US 2026/0314453 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method of filling gaps between dies using silicon dioxide8 Oct 2026US 2026/0314481 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Method of fabricating interconnect structure for package-on-package devices1,078US 9,048,222 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Package systems having interposers1,064US 9,048,233 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- 3D packages and methods for forming the same974US 9,299,649 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Discrete polymer in fan-out packages731US 9,666,502 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Fan-out PoP structure with inconsecutive polymer layer720US 9,461,018 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2016