H10D 84/8312
The igfets characterised by having different source or drain region structures
Official title: {the IGFETs characterised by having different source or drain region structures, e.g. IGFETs having symmetrical source or drain regions integrated with IGFETs having asymmetrical source or drain regions}
H10D84/8312 (The igfets characterised by having different source or drain region structures) appears on 1,180 US grants and 1,571 published applications in this corpus.
Search patents in H10D- Granted patents
- 1,180
- Published applications
- 1,571
- Assignees
- 180
- Inventors
- 2,243
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 2 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 3 | 0 |
| 1986 | 3 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 5 | 0 |
| 1990 | 5 | 0 |
| 1991 | 6 | 0 |
| 1992 | 4 | 0 |
| 1993 | 3 | 0 |
| 1994 | 5 | 0 |
| 1995 | 8 | 0 |
| 1996 | 8 | 0 |
| 1997 | 15 | 0 |
| 1998 | 14 | 0 |
| 1999 | 14 | 0 |
| 2000 | 15 | 0 |
| 2001 | 7 | 3 |
| 2002 | 15 | 10 |
| 2003 | 5 | 6 |
| 2004 | 6 | 6 |
| 2005 | 6 | 17 |
| 2006 | 7 | 15 |
| 2007 | 8 | 9 |
| 2008 | 10 | 20 |
| 2009 | 7 | 13 |
| 2010 | 11 | 16 |
| 2011 | 18 | 20 |
| 2012 | 15 | 16 |
| 2013 | 28 | 39 |
| 2014 | 28 | 42 |
| 2015 | 32 | 36 |
| 2016 | 53 | 65 |
| 2017 | 56 | 57 |
| 2018 | 56 | 74 |
| 2019 | 85 | 87 |
| 2020 | 70 | 86 |
| 2021 | 76 | 96 |
| 2022 | 82 | 129 |
| 2023 | 71 | 169 |
| 2024 | 102 | 208 |
| 2025 | 132 | 180 |
| 2026 | 77 | 152 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Wrap around backside source/drain contact6 Oct 2026US 12,757,469 B2International Business Machines Corporation
- Semiconductor device and method of manufacturing same25 Aug 2026US 12,720,786 B2Samsung Electronics Co., Ltd.
- Bonding and isolation techniques for stacked transistor structures25 Aug 2026US 12,720,818 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Source or drain metallization prior to contact formation in stacked transistors25 Aug 2026US 12,720,819 B2Intel Corporation
- Transistor source/drain regions and methods of forming the same25 Aug 2026US 12,720,823 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Three-dimensional memory device containing peripheral circuit with fin field effect transistors and method of making the same8 Oct 2026US 2026/0313892 A1SanDisk Technologies LLC
- Backside contact to devices with wide source/drain regions8 Oct 2026US 2026/0314042 A1Intel Corporation
- Semiconductor devices8 Oct 2026US 2026/0314043 A1Samsung Electronics Co., Ltd.
- Top source drain and assocated ild formation within a stacked transistor8 Oct 2026US 2026/0314044 A1International Business Machines Corporation
- Semiconductor device and method for forming the same1 Oct 2026US 2026/0304922 A1Vanguard International Semiconductor Corporation
Most cited
By later US patents
- Strained structure of semiconductor device and method of making the strained structure614US 9,171,929 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Strained channel integrated circuit devices569US 8,729,627 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2014
- Fabrication of multiple field-effect transistor structure having local threshold-adjust doping151US 6,020,227 ANational Semiconductor Corporation · 2000
- Multi-gate device and method of fabrication thereof136US 10,157,799 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2018
- Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions114US 6,891,192 B2International Business Machines Corporation · 2005