Transistor source/drain regions and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsung-Han Chuang, Zhi-Chang Lin, Shih-Cheng Chen, Jung-Hung Chang, Chien Ning Yao, Kai-Lin Chuang, Kuo-Cheng Chiang, Chih-Hao Wang
Life of this patent
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Abstract
In an embodiment, a device includes: first nanostructures; a first undoped semiconductor layer contacting a first dummy region of the first nanostructures; a first spacer on the first undoped semiconductor layer; a first source/drain region on the first spacer, the first source/drain region contacting a first channel region of the first nanostructures; and a first gate structure wrapped around the first channel region and the first dummy region of the first nanostructures.
Claims20
A method comprising:
- patterning a first source/drain recess and a second source/drain recess in first nanostructures and second nanostructures, respectively, the first nanostructures having the same dimensions as the second nanostructures;
- growing a first semiconductor layer and a second semiconductor layer in the first source/drain recess and the second source/drain recess, respectively, wherein growing the first semiconductor layer and the second semiconductor layer comprises growing a semiconductor material by performing an epitaxial growth process;
- increasing a first height of the first semiconductor layer as compared to a second height of the second semiconductor layer, wherein increasing the first height of the first semiconductor layer comprises:
- forming a mask covering the second semiconductor layer, the mask exposing the first semiconductor layer;
- growing more of the semiconductor material from the first semiconductor layer by repeating the epitaxial growth process while the second semiconductor layer is covered by the mask;
- and
- removing the mask from the second semiconductor layer;
- and
- growing a first source/drain region and a second source/drain region over the first semiconductor layer and the second semiconductor layer, respectively.
A method comprising:
- forming first nanostructures and second nanostructures;
- forming a first recess and a second recess adjacent to, respectively, the first nanostructures and the second nanostructures;
- growing a first undoped semiconductor layer and a second undoped semiconductor layer in, respectively, the first recess and the second recess;
- forming a first spacer and a second spacer on, respectively, the first undoped semiconductor layer and the second undoped semiconductor layer;
- after forming the first spacer and the second spacer, growing a first source/drain region over the first spacer and adjacent to the first nanostructures, a top surface of the first source/drain region extending above a top surface of the first nanostructures, the first source/drain region contacting a first quantity of the first nanostructures;
- and
- after forming the first spacer and the second spacer, growing a second source/drain region over the second spacer and adjacent to the second nanostructures, a top surface of the second source/drain region extending above a top surface of the second nanostructures, the second source/drain region contacting a second quantity of the second nanostructures, the second quantity of the second nanostructures being greater than the first quantity of the first nanostructures.
A method comprising:
- patterning a source/drain recess adjacent to a plurality of nanostructures;
- growing a first semiconductor layer in the source/drain recess;
- increasing a height of the first semiconductor layer until the first semiconductor layer covers first sidewalls of a first subset of the nanostructures;
- forming a dielectric spacer on the first semiconductor layer;
- after forming the dielectric spacer, growing an epitaxial source/drain region over the dielectric spacer, the epitaxial source/drain region covering second sidewalls of a second subset of the nanostructures;
- forming an inter-layer dielectric over the epitaxial source/drain region;
- and
- forming a source/drain contact through the inter-layer dielectric, the source/drain contact physically and electrically coupled to the epitaxial source/drain region.
Dependencies are inferred from the claim text.