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US 2026/0313892 A1Published application
Three-dimensional memory device containing peripheral circuit with fin field effect transistors and method of making the same
AssigneeSanDisk Technologies LLC
InventorsSatoru MAYUZUMI, Eiichi FUJIKURA, Yangyin CHEN, Mohan DUNGA
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Abstract
A semiconductor structure includes a logic die containing a fin field effect transistor having at least one semiconductor fin, and a planar field effect transistor, and a memory die containing a three-dimensional memory device bonded to the logic die.
Claims20
A semiconductor structure, comprising:
- a logic die containing a fin field effect transistor (finFET) comprising:
- at least one semiconductor fin extending along a first horizontal direction;
- a finFET channel region located in the at least one semiconductor fin;
- a finFET source extension region contacting the finFET channel region;
- a finFET drain extension region contacting the finFET channel region;
- a finFET source region contacting the finFET source extension region;
- a finFET drain region contacting the finFET drain extension region;
- a finFET gate electrode overlying the finFET channel region;
- and
- a finFET gate dielectric located between the finFET channel region and
- the finFET gate electrode;
- and
- a memory die bonded to the logic die, wherein the memory die comprises a three-dimensional memory device.
10 more elements
Dependencies are inferred from the claim text.