H10D 84/013
Manufacturing their source or drain regions
Official title: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
H10D84/013 (Manufacturing their source or drain regions) appears on 4,475 US grants and 5,582 published applications in this corpus.
Search patents in H10D- Granted patents
- 4,475
- Published applications
- 5,582
- Assignees
- 428
- Inventors
- 5,806
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 1 | 0 |
| 1994 | 3 | 0 |
| 1995 | 3 | 0 |
| 1996 | 4 | 0 |
| 1997 | 6 | 0 |
| 1998 | 16 | 0 |
| 1999 | 34 | 0 |
| 2000 | 33 | 0 |
| 2001 | 58 | 17 |
| 2002 | 62 | 74 |
| 2003 | 61 | 68 |
| 2004 | 62 | 72 |
| 2005 | 52 | 78 |
| 2006 | 55 | 99 |
| 2007 | 55 | 106 |
| 2008 | 56 | 112 |
| 2009 | 63 | 100 |
| 2010 | 83 | 105 |
| 2011 | 85 | 92 |
| 2012 | 81 | 135 |
| 2013 | 140 | 148 |
| 2014 | 152 | 176 |
| 2015 | 197 | 219 |
| 2016 | 238 | 273 |
| 2017 | 257 | 270 |
| 2018 | 333 | 295 |
| 2019 | 282 | 266 |
| 2020 | 295 | 360 |
| 2021 | 244 | 292 |
| 2022 | 259 | 431 |
| 2023 | 279 | 506 |
| 2024 | 341 | 464 |
| 2025 | 373 | 527 |
| 2026 | 208 | 297 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor structure and method for forming the same6 Oct 2026US 12,757,440 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Contact formation with staggered gate patterning6 Oct 2026US 12,757,441 B2International Business Machines Corporation
- Co-integration of S/D metal contact cut and wrap-around-contact6 Oct 2026US 12,757,445 B2International Business Machines Corporation
- Electrostatic discharge (ESD) protection device with a targeted sub-fin etch depth6 Oct 2026US 12,757,497 B2Intel Corporation
- Alignment mark for back side power connections6 Oct 2026US 12,757,704 B2International Business Machines Corporation
- FINFET Devices with Backside Power Rail and Backside Self-Aligned Via8 Oct 2026US 2026/0313945 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and method for forming the same8 Oct 2026US 2026/0313969 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Dislocations in gaa transistors and the methods of forming the same8 Oct 2026US 2026/0313972 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Transistor Including Dielectric Barrier And Manufacturing Method Thereof8 Oct 2026US 2026/0313981 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device structure with conductive contact8 Oct 2026US 2026/0313986 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- FINFETs with wrap-around silicide and method forming the same1,436US 9,608,116 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Wrap-around contact550US 9,443,769 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Wrap around silicide for FinFETs236US 9,418,897 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- FinFET device and method of forming same233US 9,812,363 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Method of increasing the mobility of MOS transistors by use of localized stress regions230US 6,228,694 B1Intel Corporation · 2001