Alignment mark for back side power connections

A semiconductor device, comprising:

• a dielectric cover layer on an interlayer dielectric layer;
• an isolation region on the dielectric cover layer;
• a backside interlayer dielectric layer on the isolation region;
• an alignment region via in the interlayer dielectric layer;
• a conductive alignment region in the dielectric cover layer, the isolation region, and the backside interlayer dielectric layer, the conductive alignment region having a vertical length that extends from a frontside interconnect side to a backside interconnect side opposite the frontside interconnect side, wherein the conductive alignment region is on and in electrical contact with the alignment region via, the conductive alignment region including a terminal surface facing the backside interconnect side, wherein the terminal surface defines an alignment mark for positioning one or more contact openings in the backside interlayer dielectric layer;
• a metallization dielectric layer on the backside interlayer dielectric layer;
• a backside interconnect in the metallization dielectric layer, wherein the backside interconnect is located on the backside interconnect side and is on and in electrical contact with the conductive alignment region;
• and
• wherein the alignment region via is located on the frontside interconnect side, wherein the conductive alignment region, the backside interconnect, and the alignment region via are separate and distinct from one another, and wherein a width of the conductive alignment region at the terminal surface is greater than a width of the alignment region via.

A method of fabricating a semiconductor device, comprising:

• forming a plurality of semiconductor devices on a substrate, the plurality of semiconductor devices including a first semiconductor device and a second semiconductor device, each of the plurality of semiconductor devices including a source/drain on a sacrificial plug, the first semiconductor device including a first source/drain on a first sacrificial plug, and the second semiconductor device including a second source/drain on a second sacrificial plug;
• forming a source/drain contact adjoining a first side of the first source/drain;
• forming a frontside via adjoining the source/drain contact;
• forming a conductive alignment region on the substrate, wherein the conductive alignment region has a vertical length that extends from a frontside interconnect side to a backside interconnect side opposite the frontside interconnect side;
• forming an alignment region via electrically connected to the conductive alignment region, wherein the alignment region via is located on the frontside interconnect side and on a same side of the first source/drain and the second source/drain as the source/drain contact and the frontside via;
• inverting the substrate, the plurality of semiconductor devices, and the conductive alignment region;
• removing the substrate to expose at least a portion of the conductive alignment region, the first sacrificial plug, and the second sacrificial plug, including exposing a terminal surface of the conductive alignment region facing the backside interconnect side, and wherein a width of the conductive alignment region at the terminal surface is greater than a width of the alignment region via;
• forming a contact opening, wherein the terminal surface defines an alignment mark for positioning the contact opening;
• forming a backside electric contact disposed in the contact opening and adjoining a first side of the second source/drain, wherein the backside electric contact is on a side opposite the source/drain contact;
• forming a backside interconnect electrically connected to the conductive alignment region, wherein the backside interconnect is located on the backside interconnect side and on a same side of the first source/drain and the second source/drain as the backside electric contact;
• and
• wherein the conductive alignment region, the backside interconnect, and the alignment region via are separate and distinct from one another.