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US 12,757,445 B2Granted
Co-integration of S/D metal contact cut and wrap-around-contact
AssigneeInternational Business Machines Corporation
InventorsJulien Frougier, Oleg Gluschenkov, Oscar van der Straten, Ruilong Xie, Juntao Li, Min Gyu Sung, Chanro Park
Life of this patent
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Abstract
A method to co-integrate a metal trench cut for aggressively scaled contact tip-to-tip and wrap-around-contact formation is provided. A semiconductor device made from the method is also provided in which a metal trench cut region and wrap-around-contacts are present.
Claims20
A semiconductor device comprising:
- a dielectric pillar located in a contact cut region that is positioned between a first source/drain region of a first transistor and a second source/drain region of a second transistor, wherein the dielectric pillar is in direct physical contact with a shallow trench isolation structure;
- a first source/drain (S/D) contact structure located on a first side of the dielectric pillar and electrically connected to the first source/drain region;
- a second S/D contact structure located on a second side of the dielectric pillar and electrically connected to the second source/drain region;
- a first metal semiconductor alloy liner continuously wrapping around the first source/drain region;
- a second metal semiconductor alloy liner continuously wrapping around the second source/drain region;
- and
- a metal conductive liner located on the first side of the dielectric pillar and on the second side of the dielectric pillar, wherein the metal conductive liner located on the first side of the dielectric pillar forms an interface with the first S/D contact structure and the first metal semiconductor alloy liner, and the metal conductive liner located on the second side of the dielectric pillar forms an interface with the second S/D contact structure and the second metal semiconductor alloy liner, wherein a bottommost surface of each of the metal conductive liner, the first metal semiconductor alloy liner and the second metal semiconductor alloy liner is spaced apart from the shallow trench isolation structure.
4 more elements
A method of forming a semiconductor device, the method comprising:
- forming a semiconductor structure comprising a first source/drain region of a first transistor located in a first active area, a second source/drain region of a second transistor located in a second active area and a MOL dielectric layer located above and adjacent to the first source/drain region and the second source/drain region;
- forming a source/drain (S/D) trench metal contact structure including a metal semiconductor alloy layer located on each of the first source/drain region and the second source/drain region and a shared contact conductor metal;
- cutting the S/D trench metal contact structure to form a contact cut region, wherein the cutting removes the metal semiconductor alloy layer from both the first source/drain region and the second source/drain region in the contact cut region and cuts the shared contact conductive metal into individual S/D contact structures;
- forming additional metal semiconductor alloy layer on physically exposed surfaces of the first source/drain region and the second source/drain region in the contact cut region;
- selectively depositing a conductive material liner in the contact cut region and along a sidewall of the additional metal semiconductor alloy layer;
- and
- filling a remaining volume of the contact cut region with a contact cut dielectric material, wherein the contact cut dielectric material extends beneath and is in contact with a bottommost surface of the additional metal semiconductor alloy layer and the conductive metal liner.
4 more elements
Dependencies are inferred from the claim text.