H10B 12/48
Data lines or contacts therefor
Official title: {Data lines or contacts therefor}
H10B12/48 (Data lines or contacts therefor) appears on 5,015 US grants and 6,558 published applications in this corpus.
Search patents in H10B- Granted patents
- 5,015
- Published applications
- 6,558
- Assignees
- 282
- Inventors
- 5,692
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1992 | 1 | 0 |
| 1993 | 0 | 0 |
| 1994 | 3 | 0 |
| 1995 | 2 | 0 |
| 1996 | 3 | 0 |
| 1997 | 1 | 0 |
| 1998 | 11 | 0 |
| 1999 | 31 | 0 |
| 2000 | 110 | 0 |
| 2001 | 219 | 92 |
| 2002 | 212 | 215 |
| 2003 | 199 | 196 |
| 2004 | 235 | 281 |
| 2005 | 192 | 228 |
| 2006 | 166 | 199 |
| 2007 | 133 | 157 |
| 2008 | 113 | 137 |
| 2009 | 125 | 118 |
| 2010 | 132 | 102 |
| 2011 | 92 | 140 |
| 2012 | 110 | 198 |
| 2013 | 156 | 162 |
| 2014 | 166 | 140 |
| 2015 | 144 | 153 |
| 2016 | 144 | 120 |
| 2017 | 100 | 55 |
| 2018 | 95 | 116 |
| 2019 | 129 | 151 |
| 2020 | 142 | 200 |
| 2021 | 185 | 257 |
| 2022 | 208 | 483 |
| 2023 | 263 | 689 |
| 2024 | 343 | 654 |
| 2025 | 470 | 659 |
| 2026 | 380 | 656 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Memory device including capacitor contacts having different materials and method for preparing the same6 Oct 2026US 12,757,374 B2Nanya Technology Corporation
- Memory device having improved P—N junction and manufacturing method thereof6 Oct 2026US 12,757,377 B2Nanya Technology Corporation
- Semiconductor memory device6 Oct 2026US 12,757,378 B2Samsung Electronics Co., Ltd.
- Memory device having improved P-N junction and manufacturing method thereof6 Oct 2026US 12,757,380 B2Nanya Technology Corporation
- Semiconductor structure having dielectric liner and method of manufacturing the same6 Oct 2026US 12,757,381 B2Nanya Technology Corporation
- Semiconductor device8 Oct 2026US 2026/0311745 A1Semiconductor Energy Laboratory Co.Ltd.
- Method for manufacturing semiconductor memory device including a bit line mask pattern8 Oct 2026US 2026/0313871 A1Samsung Electronics Co., Ltd.
- Semiconductor device and method for fabricating the same8 Oct 2026US 2026/0313872 A1SK hynix Inc.
- Semiconductor device with low-k spacer8 Oct 2026US 2026/0313877 A1SK hynix Inc.
- Semiconductor structure and method of manufacturing the same8 Oct 2026US 2026/0313878 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Method to reduce bit line capacitance in cub drams579US 6,472,266 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2002
- Memory cell arrays447US 7,045,834 B2Micron Technology, Inc. · 2006
- Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method364US 6,262,487 B1Kabushiki Kaisha Toshiba · 2001
- Memory cell having a vertical transistor with buried source/drain and dual gates325US 6,150,687 AMicron Technology, Inc. · 2000
- Merging write cycles by comparing at least a portion of the respective write cycle addresses296US 6,356,485 B1Integrated Device Technology, Inc. · 2002