Semiconductor structure having dielectric liner and method of manufacturing the same

Abstract

The present application discloses a semiconductor structure and a method for fabricating the same. The semiconductor structure includes a substrate; a bit line structure disposed over the substrate; a plurality of capacitor contact structures disposed next to the bit line structure; a plurality of dielectric liners disposed in the capacitor contact structures, wherein each of the dielectric liners surrounds at least a portion of the corresponding capacitor contact structures; and a plurality of landing pad layers each disposed partially covering a top surface and a sidewall of the corresponding capacitor contact structure. The substrate includes an isolation layer, wherein a plurality of active areas are defined by the isolation layer, wherein a plurality of source regions and drain regions are disposed in the active areas.

Dependencies are inferred from the claim text.