H10B 12/488
Word lines
Official title: {Word lines}
H10B12/488 (Word lines) appears on 1,772 US grants and 2,741 published applications in this corpus.
Search patents in H10B- Granted patents
- 1,772
- Published applications
- 2,741
- Assignees
- 154
- Inventors
- 2,898
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 1 | 0 |
| 1998 | 4 | 0 |
| 1999 | 12 | 0 |
| 2000 | 18 | 0 |
| 2001 | 35 | 8 |
| 2002 | 28 | 31 |
| 2003 | 39 | 37 |
| 2004 | 54 | 73 |
| 2005 | 45 | 56 |
| 2006 | 36 | 47 |
| 2007 | 37 | 43 |
| 2008 | 34 | 39 |
| 2009 | 33 | 34 |
| 2010 | 36 | 26 |
| 2011 | 22 | 39 |
| 2012 | 33 | 60 |
| 2013 | 46 | 60 |
| 2014 | 60 | 57 |
| 2015 | 59 | 64 |
| 2016 | 45 | 42 |
| 2017 | 36 | 24 |
| 2018 | 40 | 42 |
| 2019 | 58 | 78 |
| 2020 | 57 | 92 |
| 2021 | 83 | 122 |
| 2022 | 103 | 208 |
| 2023 | 114 | 363 |
| 2024 | 146 | 341 |
| 2025 | 249 | 355 |
| 2026 | 207 | 400 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Memory cell with reduced parasitic capacitance and conductive via extending into source/drain region6 Oct 2026US 12,757,383 B2Nanya Technology Corporation
- Memory cell with reduced parasitic capacitance and spacer between u-shaped liner and air gap6 Oct 2026US 12,757,384 B2Nanya Technology Corporation
- Semiconductor device including active pattern on bitline6 Oct 2026US 12,757,385 B2Samsung Electronics Co., Ltd.
- Semiconductor device and manufacturing method thereof6 Oct 2026US 12,757,387 B2Nanya Technology Corporation
- Word-line-pickup structure and method for forming the same6 Oct 2026US 12,757,388 B2Yangtze Memory Technologies Co., Ltd.
- Semiconductor device8 Oct 2026US 2026/0311745 A1Semiconductor Energy Laboratory Co.Ltd.
- Semiconductor structure and method of manufacturing the same8 Oct 2026US 2026/0313878 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and method for manufacturing the same8 Oct 2026US 2026/0313880 A1SK hynix Inc.
- Semiconductor device including capacitors, word line pads and word line contacts8 Oct 2026US 2026/0313882 A1Samsung Electronics Co., Ltd.
- Semiconductor memory device8 Oct 2026US 2026/0313883 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Memory cell having a vertical transistor with buried source/drain and dual gates325US 6,150,687 AMicron Technology, Inc. · 2000
- Merging write cycles by comparing at least a portion of the respective write cycle addresses296US 6,356,485 B1Integrated Device Technology, Inc. · 2002
- Vertical one-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region290US 6,686,624 B2Monolithic System Technology, Inc. · 2004
- Method for fabricating small-size two-step contacts for word-line strapping on dynamic random access memory (DRAM)222US 6,143,604 ATaiwan Semiconductor Manufacturing Company.Ltd · 2000
- Digitline architecture for dynamic memory204US 6,661,041 B2Micron Technology, Inc. · 2003