G01R 31/318563
Multiple simultaneous testing of subparts
Official title: {Multiple simultaneous testing of subparts}
G01R31/318563 (Multiple simultaneous testing of subparts) appears on 310 US grants and 295 published applications in this corpus.
Search patents in G01R- Granted patents
- 310
- Published applications
- 295
- Assignees
- 100
- Inventors
- 398
- Latest grant
- 2 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1996 | 1 | 0 |
| 1997 | 0 | 0 |
| 1998 | 1 | 0 |
| 1999 | 3 | 0 |
| 2000 | 2 | 0 |
| 2001 | 4 | 0 |
| 2002 | 6 | 11 |
| 2003 | 4 | 12 |
| 2004 | 16 | 10 |
| 2005 | 3 | 17 |
| 2006 | 10 | 5 |
| 2007 | 14 | 12 |
| 2008 | 9 | 10 |
| 2009 | 11 | 10 |
| 2010 | 18 | 17 |
| 2011 | 23 | 24 |
| 2012 | 14 | 9 |
| 2013 | 13 | 15 |
| 2014 | 19 | 17 |
| 2015 | 17 | 20 |
| 2016 | 20 | 27 |
| 2017 | 18 | 11 |
| 2018 | 15 | 14 |
| 2019 | 16 | 10 |
| 2020 | 8 | 9 |
| 2021 | 10 | 11 |
| 2022 | 9 | 2 |
| 2023 | 12 | 7 |
| 2024 | 3 | 5 |
| 2025 | 6 | 6 |
| 2026 | 5 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Streaming scan network latency balancing to reduce cost of testing identical replicated blocks2 Jun 2026US 12,645,623 B2QUALCOMM Incorporated
- High-throughput scan architecture26 May 2026US 12,638,503 B2Google Inc.
- Diagnosing identical circuit blocks in data streaming environment7 Apr 2026US 12,596,149 B2Siemens Industry Software Inc.
- X-masking for in-system deterministic test7 Apr 2026US 12,596,150 B2Siemens Industry Software Inc.
- Interface/unicast for test content, firmware, and software delivery27 Jan 2026US 12,535,525 B2Altera Corporation
- Hardware decoder for run-length encoded mask bits for in-system automatic test pattern generation (atpg)28 May 2026US 2026/0147040 A1QUALCOMM Incorporated
- Scan chain segmentation for an integrated circuit21 May 2026US 2026/0140177 A1QUALCOMM Incorporated
- System and method for testing identical cores21 May 2026US 2026/0140178 A1NXP B. V.
- Scan Chain Analysis Using Predefined Capture Signature30 Apr 2026US 2026/0118425 A1Apple Inc.
- Test pattern reset control circuit11 Dec 2025US 2025/0377409 A1STMicroelectronics International N. V.
Most cited
By later US patents
- Method of designing circuit having multiple test access ports, circuit produced thereby and method of using same144US 6,829,730 B2LogicVision, Inc. · 2004
- Addressable shadow port and protocol for serial bus networks133US 5,483,518 ATexas Instruments Incorporated · 1996
- Method and apparatus for optimized parallel testing and access of electronic circuits113US 6,988,232 B2Intellitech Corporation · 2006
- Selectively accessing test access ports in a multiple test access port environment107US 6,073,254 ATexas Instruments Incorporated · 2000
- Hierarchical access of test access ports in embedded core integrated circuits94US 6,408,413 B1Texas Instruments Incorporated · 2002