H10W 90/726
Between a chip and a stacked lead frame, conducting package substrate or
Official title: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
H10W90/726 (Between a chip and a stacked lead frame, conducting package substrate or) appears on 2,039 US grants and 2,396 published applications in this corpus.
Search patents in H10W- Granted patents
- 2,039
- Published applications
- 2,396
- Assignees
- 524
- Inventors
- 3,664
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 2 | 0 |
| 1987 | 2 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 9 | 0 |
| 1993 | 4 | 0 |
| 1994 | 7 | 0 |
| 1995 | 6 | 0 |
| 1996 | 2 | 0 |
| 1997 | 9 | 0 |
| 1998 | 12 | 0 |
| 1999 | 14 | 0 |
| 2000 | 15 | 0 |
| 2001 | 19 | 10 |
| 2002 | 19 | 43 |
| 2003 | 37 | 40 |
| 2004 | 31 | 34 |
| 2005 | 44 | 79 |
| 2006 | 51 | 76 |
| 2007 | 47 | 94 |
| 2008 | 49 | 96 |
| 2009 | 46 | 73 |
| 2010 | 64 | 64 |
| 2011 | 76 | 73 |
| 2012 | 78 | 131 |
| 2013 | 99 | 121 |
| 2014 | 107 | 123 |
| 2015 | 126 | 159 |
| 2016 | 133 | 171 |
| 2017 | 179 | 144 |
| 2018 | 111 | 122 |
| 2019 | 115 | 105 |
| 2020 | 117 | 147 |
| 2021 | 83 | 99 |
| 2022 | 80 | 105 |
| 2023 | 81 | 71 |
| 2024 | 73 | 77 |
| 2025 | 59 | 81 |
| 2026 | 28 | 58 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Memory device and method of assembling same22 Sep 2026US 12,745,632 B2SanDisk Technologies LLC
- Chip package with heat dissipation plate and manufacturing method thereof18 Aug 2026US 12,713,930 B2Stats Chippac Semiconductor (Jiangyin) Co., Ltd.
- Sintered metal flip chip joints18 Aug 2026US 12,713,938 B2Texas Instruments Incorporated
- Lasing to attach die to lead frame18 Aug 2026US 12,713,963 B2Texas Instruments Incorporated
- Three-dimensional integration structure and method of forming the same11 Aug 2026US 12,707,634 B2Yangtze Memory Technologies Co., Ltd.
- Semiconductor device8 Oct 2026US 2026/0314463 A1Kabushiki Kaisha Toshiba
- Package with t-shaped source electrode1 Oct 2026US 2026/0305387 A1GaNrich Semiconductor Corporation
- Semiconductor device and method of manufacturing semiconductor device1 Oct 2026US 2026/0305444 A1Mitsubishi Electric Corporation
- Multi-layer metal stack for wire bonding1 Oct 2026US 2026/0305453 A1
- Laminate passive structure with stand-off for multilevel module integration17 Sep 2026US 2026/0283053 A1Qorvo US, Inc.
Most cited
By later US patents
- Saw-singulated leadless plastic chip carrier427US 6,229,200 B1ASAT Ltd. · 2001
- Leadless semiconductor device and method for making the same346US 5,172,214 AMotorola, Inc. · 1992
- Saw-singulated leadless plastic chip carrier339US 6,242,281 B1ASAT Ltd. · 2001
- Plastic-encapsulated semiconductor device337US 5,641,997 AKabushiki Kaisha Toshiba · 1997
- Lead connections means for stacked tab packaged IC chips312US 5,138,438 AAkita Electronics Co., Ltd. · 1992