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US 5,138,438 AGranted
Lead connections means for stacked tab packaged IC chips
AssigneesAkita Electronics Co., Ltd., Hitachi, Ltd., Hitachi Semiconductor Ltd.
InventorsWatanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi, Wakashima Yoshiaki
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Abstract
In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.
Claims13
A semiconductor memory device comprising:
- (a) first and second semiconductor chips stacked above each other, each having a substantially rectangular shape and having first and second principal surfaces, and each of said first and second semiconductor chips having a plurality of first electrodes and a second electrode on said first principal surface;
- (b) a plurality of first leads, each being connected to at least one of said first electrodes of said first semiconductor chip and at least one of said first electrodes of said second semiconductor chip;
- (c) a second lead connected to said second electrode of said first semiconductor chip;
- and
- (d) a third lead connected to said second electrode of said second semiconductor chip;
- wherein said second and third leads are electrically independently each other.
3 more elements
A multiple chip semiconductor device comprising:
- (a) an upper and a lower semiconductor chip stacked above each other, each having a first principal surface, and each having a plurality of first electrodes and a second electrode disposed on said principal surface;
- (b) a plurality of first leads, each having at one end an associated first and second branch lead, said first branch lead being connected to at least one electrode from among said plurality of first electrodes on said lower chip and said second branch lead being connected to at least one electrode from among said plurality of electrodes on said upper chip;
- (c) a lead connected to said second electrode of said lower semiconductor chip, said lead being electrically independent from each of said first leads;
- and
- (d) a lead connected to said second electrode of said upper semiconductor, said lead being electrically independent from each of said first leads and from said lead connected to said second electrode of said lower semiconductor chip.
2 more elements
A multiple chip semiconductor device comprising:
- (a) a lower semiconductor chip and an upper semiconductor chip arranged above said lower chip;
- (b) a plurality of first upper bump electrodes and a second upper bump electrode disposed on said upper semiconductor chip;
- (c) a plurality of first lower bump electrodes and a second lower bump electrode disposed on said lower semiconductor chip;
- (d) a plurality of first lower tape automated bonding tape leads, each having a first and second end, each connected at its said first end to a corresponding one of said first lower bump electrodes;
- (e) a second lower tape automated bonding tape lead, having a first and second end, connected at said first end to said second lower bump electrode;
- (f) a plurality of first upper tape automated bonding tape leads, each having a first and second end, each connected at its said first end to a corresponding one of said first upper bump electrodes;
- (g) a second upper tape automated bonding tape lead, having a first and second end, each connected at its said first end to said second upper bump electrode;
- (h) a plurality of first device leads, each having at one end a termination area, and at the other end a corresponding upper and lower branch lead, said upper branch lead connecting to the second end of a tape automated bonding tape lead among said first upper tape automated bonding tape leads and said lower branch lead connected to the second end of a tape automated bonding tape lead among said first lower tape automated bonding tape leads;
- (i) an upper device lead, electrically independently from each of said first device leads, connected at one end to said second end of said upper tape automated bonding tape lead;
- (j) a lower device lead, electrically independent from said upper device lead and from each of said first device leads, connected at one end to said second end of said lower connection electrode.
7 more elements
Dependencies are inferred from the claim text.