H10D 30/6215
Having multiple independently-addressable gate electrodes
Official title: {having multiple independently-addressable gate electrodes}
H10D30/6215 (Having multiple independently-addressable gate electrodes) appears on 594 US grants and 673 published applications in this corpus.
Search patents in H10D- Granted patents
- 594
- Published applications
- 673
- Assignees
- 101
- Inventors
- 996
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2004 | 0 | 1 |
| 2005 | 2 | 4 |
| 2006 | 1 | 1 |
| 2007 | 1 | 2 |
| 2008 | 4 | 6 |
| 2009 | 3 | 8 |
| 2010 | 7 | 11 |
| 2011 | 3 | 4 |
| 2012 | 13 | 17 |
| 2013 | 12 | 20 |
| 2014 | 18 | 30 |
| 2015 | 36 | 43 |
| 2016 | 44 | 50 |
| 2017 | 49 | 41 |
| 2018 | 51 | 62 |
| 2019 | 68 | 77 |
| 2020 | 56 | 69 |
| 2021 | 56 | 58 |
| 2022 | 39 | 43 |
| 2023 | 45 | 38 |
| 2024 | 42 | 37 |
| 2025 | 33 | 32 |
| 2026 | 11 | 19 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Non-epitaxial electrical coupling between a front side trench connector and back side contacts of a transistor8 Sep 2026US 12,733,200 B2Intel Corporation
- Embedded high-voltage semiconductor device and fabrication method thereof18 Aug 2026US 12,713,641 B2United Microelectronics Corp.
- Multi-threshold voltage devices and associated techniques and configurations21 Jul 2026US 12,690,223 B2Sony Group Corporation
- Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates with etch back process16 Jun 2026US 12,660,245 B2Intel Corporation
- Performance optimization by sizing gates and source/drain contacts differently for different transistors12 May 2026US 12,628,406 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Non-epitaxial electrical coupling between a front side trench connector and back side contacts of a transistor17 Sep 2026US 2026/0282427 A1Intel Foundry IP LLC
- Performance optimization by sizing gates and source/drain contacts differently for different transistors17 Sep 2026US 2026/0282492 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates with etch back process23 Jul 2026US 2026/0214942 A1Intel Corporation
- Barrier-free approach for forming contact plugs16 Jul 2026US 2026/0206559 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Transistor with fin structure and nanosheet and fabricating method of the same25 Jun 2026US 2026/0181977 A1United Microelectronics Corp.
Most cited
By later US patents
- FinFET and method of fabricating the same256US 8,440,517 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2013
- Vertical gate-all-around TFET79US 9,385,195 B1STMicroelectronics S.r. l. · 2016
- Method of maintaining the state of semiconductor memory having electrically floating body transistor63US 10,340,276 B2Zeno Semiconductor, Inc. · 2019
- Method of maintaining the state of semiconductor memory having electrically floating body transistor60US 10,453,847 B2Zeno Semiconductor, Inc. · 2019
- Method of maintaining the state of semiconductor memory having electrically floating body transistor51US 10,593,675 B2Zeno Semiconductor, Inc. · 2020