Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates with etch back process

An integrated circuit structure, comprising:

• a first fin;
• a second fin;
• a first gate stack over the first fin;
• a second gate stack over the second fin, an end of the second gate stack spaced apart from an end of the first gate stack by a gap;
• first sidewall spacers along sidewalls of the first gate stack and the second gate stack and in the gap;
• a dielectric material between the first sidewall spacers in the gap;
• and
• second sidewall spacers along the first sidewall spacers and on the dielectric material in the gap.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a first vertical arrangement of horizontal nanowires or fin;
• a second vertical arrangement of horizontal nanowires or fin;
• a first gate stack over the first vertical arrangement of horizontal nanowires or fin;
• a second gate stack over the second vertical arrangement of horizontal nanowires or fin, an end of the second gate stack spaced apart from an end of the first gate stack by a gap;
• first sidewall spacers along sidewalls of the first gate stack and the second gate stack and in the gap;
• a dielectric material between the first sidewall spacers in the gap;
• and
• second sidewall spacers along the first sidewall spacers and on the dielectric material in the gap.