Embedded high-voltage semiconductor device and fabrication method thereof

A method for forming an embedded high-voltage (eHV) semiconductor device, comprising:

• providing a substrate having a low-voltage device region and a high-voltage device region thereon;
• forming an inter-layer dielectric (ILD) layer on the substrate;
• forming a first trench isolation region in the substrate within the low-voltage device region;
• forming a first gate disposed in the ILD layer and on the first trench isolation region;
• forming a first gate contact in the ILD layer and on the first gate;
• forming a first interconnection metal layer overlying the first gate contact;
• forming a first inter-metal dielectric (IMD) layer on the ILD layer and between the first interconnection metal layer and the first gate contact;
• forming a second trench isolation region in the substrate within the high-voltage device region;
• forming a second gate in the ILD layer and on the second trench isolation region;
• forming a second gate contact in the ILD layer and on the second gate;
• forming a second interconnection metal layer overlying the second gate contact;
• and
• forming a second inter-metal dielectric (IMD) layer on the ILD layer and between the second interconnection metal layer and the second gate contact, wherein the second IMD layer is denser than the first IMD layer.