H10B 43/40

Eeprom devices comprising charge-trapping gate insulators: characterised by the peripheral circuit region

Official title: characterised by the peripheral circuit region

H10B43/40 (Eeprom devices comprising charge-trapping gate insulators: characterised by the peripheral circuit region) appears on 4,106 US grants and 5,502 published applications in this corpus.

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Granted patents
4,106
Published applications
5,502
Assignees
201
Inventors
4,496
Latest grant
6 Oct 2026

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H10B 43/40: granted patents and published applications per publication year
YearGranted patentsPublished applications
199110
199200
199300
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199500
199600
199700
199810
199900
200010
200100
200297
20031425
2004714
20052225
20062525
20071425
20081038
20092166
20103053
20116473
20126375
20137888
2014100116
2015125151
2016181225
2017215236
2018218227
2019247354
2020389477
2021382581
2022381600
2023380550
2024450554
2025420503
2026258414

By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.

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