Vertical memory devices

A semiconductor device comprising:

• a gate electrode structure including gate electrodes on a substrate, the gate electrodes being spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate, each of the gate electrodes extending in a second direction substantially parallel to the upper surface of the substrate;
• a memory channel extending through the gate electrode structure on the substrate;
• and
• a support pattern array including support patterns, each of the support patterns extending through the gate electrode structure in the first direction, the support patterns spaced apart from each other in the second direction and a third direction substantially parallel to the upper surface of the substrate and crossing the second direction, the support pattern array including:
• a first support pattern column extending in the second direction;
• and
• a second support pattern column extending in the second direction and spaced apart from the first support pattern column in the third direction,
• wherein the first support pattern column includes a first support pattern, a third support pattern and a fifth support pattern alternately and repeatedly arranged in the second direction,
• wherein the second support pattern column includes a second support pattern, a fourth support pattern and a sixth support pattern alternately and repeatedly arranged in the second direction, and wherein the second support pattern, the fourth support pattern, and the sixth support pattern are aligned with the first support pattern, the third support pattern, and the fifth support pattern in the third direction, respectively, and
• wherein in a plan view:
• the third support pattern and the first support pattern have substantially the same shape, and the fifth support pattern is substantially axially symmetric with the first support pattern with respect to a first straight line extending in the third direction, and
• the fourth support pattern is substantially axially symmetric with the second support pattern with respect to a second straight line extending in the third direction, and the sixth support pattern and the second support pattern have substantially the same shape.

A semiconductor device comprising:

• a gate electrode structure including gate electrodes on a substrate, the gate electrodes being spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate, each of the gate electrodes extending in a second direction substantially parallel to the upper surface of the substrate, the gate electrode structure having a staircase shape including steps, wherein a lower step protrudes farther in the second direction than a higher step;
• a memory channel extending through the gate electrode structure on the substrate;
• a support pattern array including support patterns, each of the support patterns extending through the gate electrode structure in the first direction, the support patterns spaced apart from each other in the second direction and a third direction substantially parallel to the upper surface of the substrate and crossing the second direction;
• and
• contact plugs, each of the contact plugs contacting a corresponding one of the steps of the gate electrode structure,
• wherein the support pattern array includes:
• a first support pattern column having a first support pattern, a third support pattern and a fifth support pattern arranged in the second direction;
• and
• a second support pattern column having a second support pattern, a fourth support pattern and a sixth support pattern arranged in the second direction, wherein the second support pattern, the fourth support pattern, and the sixth support pattern are aligned with the first support pattern, the third support pattern, and the fifth support pattern in the third direction, respectively, and
• wherein in a plan view:
• the first support pattern, the third support pattern, and the fifth support pattern have substantially the same shape, and wherein the second support pattern, the fourth support pattern, and the sixth support pattern have substantially the same shape,
• the first support pattern is substantially radially symmetric with the second support pattern with respect to a point therebetween, and
• each of the contact plugs is disposed in an area between the third support pattern, the fourth support pattern, the fifth support pattern, and the sixth support pattern.