Staircase structures for accessing three-dimensional memory arrays

An apparatus, comprising:

• a substrate;
• a memory region over the substrate and comprising a plurality of levels of memory cells;
• and
• an access region over the substrate and comprising:
• a plurality of word lines associated with accessing the plurality of levels of memory cells;
• a conductive pillar for coupling a first word line at a first level of memory cells with decoder circuitry in association with accessing a set of memory cells at the first level, wherein the conductive pillar is located in a channel region between word lines at levels over the first level and for providing access to the first word line, and wherein the conductive pillar extends, in a first direction orthogonal to the substrate, from the first word line through a fill material in the channel region over the first word line;
• a metal contact in contact with the first word line and the conductive pillar;
• and
• an oxide material in contact with the first word line and a dielectric material located between the first level and a second level of memory cells over the first level, wherein the oxide material is different from the dielectric material and is in contact with the metal contact, the conductive pillar, and the first word line.