H10W 90/288
Characterised by arrangements for thermal management of the stacked chips
Official title: {characterised by arrangements for thermal management of the stacked chips}
H10W90/288 (Characterised by arrangements for thermal management of the stacked chips) appears on 3,265 US grants and 4,441 published applications in this corpus.
Search patents in H10W- Granted patents
- 3,265
- Published applications
- 4,441
- Assignees
- 538
- Inventors
- 5,044
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 3 | 0 |
| 1986 | 1 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 3 | 0 |
| 1990 | 10 | 0 |
| 1991 | 14 | 0 |
| 1992 | 3 | 0 |
| 1993 | 8 | 0 |
| 1994 | 14 | 0 |
| 1995 | 20 | 0 |
| 1996 | 25 | 0 |
| 1997 | 14 | 0 |
| 1998 | 22 | 0 |
| 1999 | 19 | 0 |
| 2000 | 25 | 0 |
| 2001 | 31 | 12 |
| 2002 | 34 | 42 |
| 2003 | 27 | 41 |
| 2004 | 46 | 75 |
| 2005 | 44 | 57 |
| 2006 | 48 | 100 |
| 2007 | 54 | 88 |
| 2008 | 46 | 82 |
| 2009 | 50 | 70 |
| 2010 | 79 | 83 |
| 2011 | 82 | 77 |
| 2012 | 85 | 113 |
| 2013 | 98 | 113 |
| 2014 | 93 | 127 |
| 2015 | 121 | 194 |
| 2016 | 189 | 202 |
| 2017 | 170 | 172 |
| 2018 | 179 | 188 |
| 2019 | 165 | 202 |
| 2020 | 166 | 243 |
| 2021 | 179 | 232 |
| 2022 | 192 | 296 |
| 2023 | 224 | 408 |
| 2024 | 252 | 400 |
| 2025 | 270 | 452 |
| 2026 | 157 | 372 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Inverted memory stack6 Oct 2026US 12,757,735 B2Advanced Micro Devices, Inc.
- Semiconductor package with stacked dies and thermal substrate encapsulation6 Oct 2026US 12,757,780 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Switched-capacitor network packaged with load6 Oct 2026US RE51,058 E1pSemi Corporation
- Semiconductor structure with integrated passive device having opposed solder bumps22 Sep 2026US 12,745,672 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-chip high memory bandwidth configuration22 Sep 2026US 12,745,683 B2International Business Machines Corporation
- Creating a sintering metallization layer on exposed surfaces of silicon dies for dsmbgas to enhance heat dissipation8 Oct 2026US 2026/0314403 A1Qorvo US, Inc.
- Semiconductor device8 Oct 2026US 2026/0314474 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor package having a multi-layer film structure8 Oct 2026US 2026/0314477 A1SanDisk Technologies LLC
- Memory devices and microelectronic device packages including wirebonding and related methods8 Oct 2026US 2026/0314501 A1
- Semiconductor device assemblies and systems with improved thermal performance and methods for making the same1 Oct 2026US 2026/0305476 A1Micron Technology, Inc.
Most cited
By later US patents
- Method for fabricating an integrated circuit module849US 5,353,498 AGeneral Electric Company · 1994
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices775US 7,157,787 B2Intel Corporation · 2007
- Three-dimensional multi-chip pad array carrier602US 5,222,014 AMotorola, Inc. · 1993
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices528US 6,762,076 B2Intel Corporation · 2004
- Three-dimensional multichip package444US 5,481,133 AUnited Microelectronics Corp. · 1996