H10W 72/9413
On encapsulations
Official title: {on encapsulations}
H10W72/9413 (On encapsulations) appears on 7,071 US grants and 8,156 published applications in this corpus.
Search patents in H10W- Granted patents
- 7,071
- Published applications
- 8,156
- Assignees
- 749
- Inventors
- 6,298
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 3 | 0 |
| 1991 | 2 | 0 |
| 1992 | 2 | 0 |
| 1993 | 3 | 0 |
| 1994 | 8 | 0 |
| 1995 | 2 | 0 |
| 1996 | 8 | 0 |
| 1997 | 5 | 0 |
| 1998 | 6 | 0 |
| 1999 | 16 | 0 |
| 2000 | 11 | 0 |
| 2001 | 19 | 7 |
| 2002 | 20 | 29 |
| 2003 | 23 | 42 |
| 2004 | 48 | 73 |
| 2005 | 47 | 100 |
| 2006 | 61 | 118 |
| 2007 | 69 | 95 |
| 2008 | 76 | 185 |
| 2009 | 89 | 204 |
| 2010 | 145 | 244 |
| 2011 | 197 | 269 |
| 2012 | 213 | 283 |
| 2013 | 251 | 304 |
| 2014 | 287 | 357 |
| 2015 | 323 | 484 |
| 2016 | 427 | 506 |
| 2017 | 532 | 604 |
| 2018 | 542 | 582 |
| 2019 | 591 | 632 |
| 2020 | 614 | 797 |
| 2021 | 562 | 623 |
| 2022 | 508 | 611 |
| 2023 | 485 | 360 |
| 2024 | 439 | 303 |
| 2025 | 336 | 238 |
| 2026 | 90 | 106 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Non-volatile programmable logic device based on multi-chip package15 Sep 2026US 12,737,520 B2iCometrue Company Ltd.
- Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices15 Sep 2026US 12,737,522 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages1 Sep 2026US 12,727,502 B2STATS ChipPAC Pte. Ltd.
- UV-curable resin compositions suitable for redistribution layers25 Aug 2026US 12,717,232 B2Designer Molecules, Inc.
- Semiconductor package or a printed circuit board, both modified to one or more of reduce, inverse or utilize magnetic coupling caused by the load current of a semiconductor transistor25 Aug 2026US 12,721,186 B2Infineon Technologies Austria AG
- Semiconductor Device and Method of Forming Channels in Encapsulant to Reduce Warpage in Reconstituted Wafer8 Oct 2026US 2026/0314472 A1STATS ChipPAC Pte. Ltd.
- Semiconductor structure and manufacturing method thereof1 Oct 2026US 2026/0305399 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor package structure and method of fabricating the same24 Sep 2026US 2026/0287818 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Under-Bump-Metallization Structure and Redistribution Layer Design for Integrated Fan-Out Package with Integrated Passive Device17 Sep 2026US 2026/0283028 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Metal oxide layered structure and methods of forming the same10 Sep 2026US 2026/0271682 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Method of fabricating interconnect structure for package-on-package devices1,078US 9,048,222 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Methods and apparatus of wafer level package for heterogeneous integration technology1,051US 9,111,949 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Packaged semiconductor device with a molding compound and a method of forming the same1,039US 9,000,584 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Fan-out interconnect structure and method for forming same1,030US 9,368,460 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Package with metal-insulator-metal capacitor and method of manufacturing the same1,021US 9,263,511 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016