Semiconductor package or a printed circuit board, both modified to one or more of reduce, inverse or utilize magnetic coupling caused by the load current of a semiconductor transistor

A semiconductor package, comprising

• a semiconductor transistor circuit comprising
• a semiconductor transistor die comprising die terminals, including a collector/drain, a source/emitter, a sense source/sense emitter, a gate, and a load path;
• a driver line connected with the gate;
• and
• a gate control loop in which the source/emitter is connected with the driver line;
• a plurality of external contacts comprising a first external contact connected with the collector/drain, at least one second external contact connected with the source/emitter, a third external contact connected with the sense source/sense emitter, and a fourth external contact connected with the gate;
• wherein
• wherein the semiconductor package comprises one of the following arrangements:
• a coupling enhancing arrangement of the external contacts whereby a switching speed of the transistor die is enhanced by a load current flowing through the first and second external contacts that is magnetically coupled with the fourth external contact;
• or
• a coupling mitigation arrangement that mitigates a magnetic coupling influence of the second external contact when the load current flows through the first and second external contacts.