H10W 72/9226
With via interconnections
Official title: {with via interconnections}
H10W72/9226 (With via interconnections) appears on 924 US grants and 1,147 published applications in this corpus.
Search patents in H10W- Granted patents
- 924
- Published applications
- 1,147
- Assignees
- 250
- Inventors
- 1,787
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 2 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 2 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 2 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 4 | 4 |
| 2002 | 8 | 8 |
| 2003 | 12 | 22 |
| 2004 | 15 | 25 |
| 2005 | 15 | 50 |
| 2006 | 26 | 39 |
| 2007 | 14 | 37 |
| 2008 | 15 | 56 |
| 2009 | 36 | 46 |
| 2010 | 41 | 86 |
| 2011 | 52 | 44 |
| 2012 | 60 | 75 |
| 2013 | 64 | 69 |
| 2014 | 61 | 81 |
| 2015 | 86 | 81 |
| 2016 | 74 | 64 |
| 2017 | 56 | 37 |
| 2018 | 45 | 35 |
| 2019 | 48 | 36 |
| 2020 | 35 | 47 |
| 2021 | 30 | 36 |
| 2022 | 30 | 27 |
| 2023 | 27 | 30 |
| 2024 | 23 | 37 |
| 2025 | 22 | 51 |
| 2026 | 12 | 24 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor device15 Sep 2026US 12,740,074 B2Kioxia Corporation
- Cryo-compatible quantum computing arrangement and method for producing a cryo-compatible quantum computing arrangement25 Aug 2026US 12,721,131 B2Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e. V.
- Thermally conductive semiconductor packaging structure and method for preparing same25 Aug 2026US 12,721,161 B2SJ Semiconductor(Jiangyin) Corporation
- Systems and methods for bonding semiconductor devices28 Jul 2026US 12,696,826 B2Tokyo Electron Limited
- Semiconductor package and method for manufacturing the semiconductor package14 Jul 2026US 12,685,213 B2Samsung Electronics Co., Ltd.
- Low resistance structures in systems8 Oct 2026US 2026/0314467 A1Micron Technology, Inc.
- thermally conductive semiconductor packaging structure and method for preparing same1 Oct 2026US 2026/0305331 A1SJ Semiconductor(Jiangyin) Corporation
- Semiconductor memory device17 Sep 2026US 2026/0282870 A1Samsung Electronics Co., Ltd.
- Magnetic memory device10 Sep 2026US 2026/0271305 A1Samsung Electronics Co., Ltd.
- Semiconductor device including back-side conductive pattern, pillar pattern and front-side conductive pattern, and semiconductor package including the same6 Aug 2026US 2026/0231747 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack497US 6,661,085 B2Intel Corporation · 2003
- Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same497US 6,887,769 B2Intel Corporation · 2005
- Wafer level stack structure for system-in-package and method thereof377US 7,215,033 B2Samsung Electronics Co., Ltd. · 2007
- Making electrical components in handle wafers of integrated circuit packages310US 9,165,793 B1Invensas Corporation · 2015
- Methods of forming conductive vias through substrates, and structures and assemblies resulting therefrom284US 8,183,151 B2Micron Technology, Inc. · 2012