H10W 72/922
Bond pads being integral with underlying chip-level interconnections
Official title: {Bond pads being integral with underlying chip-level interconnections}
H10W72/922 (Bond pads being integral with underlying chip-level interconnections) appears on 4,114 US grants and 4,774 published applications in this corpus.
Search patents in H10W- Granted patents
- 4,114
- Published applications
- 4,774
- Assignees
- 650
- Inventors
- 5,677
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 5 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 3 | 0 |
| 1991 | 2 | 0 |
| 1992 | 1 | 0 |
| 1993 | 3 | 0 |
| 1994 | 2 | 0 |
| 1995 | 1 | 0 |
| 1996 | 2 | 0 |
| 1997 | 3 | 0 |
| 1998 | 6 | 0 |
| 1999 | 12 | 0 |
| 2000 | 25 | 0 |
| 2001 | 42 | 31 |
| 2002 | 60 | 81 |
| 2003 | 80 | 117 |
| 2004 | 78 | 145 |
| 2005 | 105 | 208 |
| 2006 | 120 | 194 |
| 2007 | 117 | 192 |
| 2008 | 108 | 240 |
| 2009 | 142 | 203 |
| 2010 | 180 | 242 |
| 2011 | 188 | 173 |
| 2012 | 202 | 238 |
| 2013 | 225 | 241 |
| 2014 | 219 | 265 |
| 2015 | 277 | 281 |
| 2016 | 266 | 243 |
| 2017 | 242 | 201 |
| 2018 | 212 | 191 |
| 2019 | 201 | 202 |
| 2020 | 187 | 238 |
| 2021 | 161 | 210 |
| 2022 | 166 | 186 |
| 2023 | 158 | 126 |
| 2024 | 138 | 140 |
| 2025 | 105 | 131 |
| 2026 | 67 | 55 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Wafer-level hybrid bonded RF switch with redistribution layer6 Oct 2026US 12,757,792 B2Qorvo US, Inc.
- Direct hybrid bond pad having tapered sidewall29 Sep 2026US 12,751,328 B2Adeia Semiconductor Bonding Technologies Inc.
- Semiconductor device15 Sep 2026US 12,740,074 B2Kioxia Corporation
- Package structure having a semiconductor functional structure and redistribution layers (RDLs)8 Sep 2026US 12,733,459 B2Changxin Memory Technologies, Inc.
- Photosensitive resin composition, photosensitive sheet, cured film, method for producing cured film, electronic component, antenna element, semiconductor package, and display device1 Sep 2026US 12,724,345 B2Toray Industries, Inc.
- Low resistance structures in systems8 Oct 2026US 2026/0314467 A1Micron Technology, Inc.
- Semiconductor devices, assemblies, and associated methods8 Oct 2026US 2026/0314491 A1Micron Technology, Inc.
- Display device and method of manufacturing the same1 Oct 2026US 2026/0301629 A1Samsung Display Co., Ltd.
- Semiconductor device with advanced pad structure and method for forming same1 Oct 2026US 2026/0302085 A1Taiwan Semiconductor Manufacturing Company.Ltd
- thermally conductive semiconductor packaging structure and method for preparing same1 Oct 2026US 2026/0305331 A1SJ Semiconductor(Jiangyin) Corporation
Most cited
By later US patents
- Fan-out interconnect structure and method for forming same1,030US 9,368,460 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Packaging methods and structures using a die attach film854US 9,064,879 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Method and apparatus for generating a device ID for stacked devices631US 7,111,149 B2Intel Corporation · 2006
- Interconnect structure for wafer level package596US 8,829,676 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2014
- Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack497US 6,661,085 B2Intel Corporation · 2003