H10W 72/01231
Using blanket deposition
Official title: {using blanket deposition}
H10W72/01231 (Using blanket deposition) appears on 2,937 US grants and 3,484 published applications in this corpus.
Search patents in H10W- Granted patents
- 2,937
- Published applications
- 3,484
- Assignees
- 521
- Inventors
- 4,169
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 1 | 0 |
| 1995 | 5 | 0 |
| 1996 | 5 | 0 |
| 1997 | 3 | 0 |
| 1998 | 4 | 0 |
| 1999 | 6 | 0 |
| 2000 | 10 | 0 |
| 2001 | 9 | 4 |
| 2002 | 18 | 16 |
| 2003 | 13 | 14 |
| 2004 | 16 | 24 |
| 2005 | 15 | 38 |
| 2006 | 18 | 53 |
| 2007 | 21 | 56 |
| 2008 | 29 | 75 |
| 2009 | 39 | 58 |
| 2010 | 52 | 70 |
| 2011 | 64 | 132 |
| 2012 | 93 | 182 |
| 2013 | 123 | 217 |
| 2014 | 165 | 218 |
| 2015 | 215 | 251 |
| 2016 | 224 | 218 |
| 2017 | 254 | 246 |
| 2018 | 224 | 214 |
| 2019 | 215 | 263 |
| 2020 | 225 | 251 |
| 2021 | 191 | 239 |
| 2022 | 201 | 186 |
| 2023 | 160 | 126 |
| 2024 | 153 | 147 |
| 2025 | 109 | 120 |
| 2026 | 52 | 66 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor device and method of fabricating the same6 Oct 2026US 12,757,777 B2Samsung Electronics Co., Ltd.
- Multiple plated via arrays of different wire heights on a same substrate6 Oct 2026US RE51,062 E1Adeia Semiconductor Technologies LLC
- Semiconductor package and method of manufacturing the same8 Sep 2026US 12,733,547 B2Samsung Electronics Co., Ltd.
- Solder paste, method for forming solder bumps, and method for manufacturing member provided with solder bumps25 Aug 2026US 12,721,203 B2
- Sintered metal flip chip joints18 Aug 2026US 12,713,938 B2Texas Instruments Incorporated
- Wiring substrate8 Oct 2026US 2026/0309912 A1Ibiden Co., Ltd.
- Semiconductor packages with separately plated metal pillars1 Oct 2026US 2026/0305410 A1Texas Instruments Incorporated
- Semiconductor structure and fabrication method thereof1 Oct 2026US 2026/0305439 A1United Microelectronics Corp.
- Multi-layer metal stack for wire bonding1 Oct 2026US 2026/0305453 A1
- Co-integration of Airbridges and 3D Integration Modules24 Sep 2026US 2026/0293678 A1
Most cited
By later US patents
- Testing of semiconductor chips with microbumps1,870US 9,372,206 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- 3DIC stacking device and method of manufacture962US 9,443,783 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Multi-chip programmable logic device having configurable logic circuitry and configuration data storage on different dice399US 6,917,219 B2Xilinx, Inc. · 2005
- Backside method for fabricating semiconductor components with conductive interconnects311US 7,393,770 B2Micron Technology, Inc. · 2008
- Wafer scale packaging scheme253US 6,103,552 A2000