Semiconductor device and method of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKunsang Park, Ho-Jin Lee, Seokho Kim
Life of this patent
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Abstract
A semiconductor device may include a lower structure including a first substrate, a first pad on the first substrate, and a first insulating layer enclosing the first pad, and an upper structure including a second substrate, a second pad on the second substrate, and a second insulating layer enclosing the second pad. Each of the first and second pads may include a first portion and a second portion on the first portion. The second portion may include the same metallic material as the first portion. The second portion of the first pad may be in contact with the second portion of the second pad, and the first insulating layer may be in contact with the second insulating layer.
Claims18
A semiconductor device, comprising:
- a lower structure including a first substrate, a first pad on the first substrate, and a first insulating layer enclosing the first pad;
- and
- an upper structure including a second substrate, a second pad on the second substrate, and a second insulating layer enclosing the second pad,
- wherein each of the first and second pads comprises a first portion and a second portion on the first portion,
- wherein an area of a surface of the second portion that faces the first portion is the same as an area of a surface of the first portion that faces the second portion,
- wherein, in each of the first and second pads, a grain size of the first portion is larger than a grain size of the second portion,
- wherein the second portion comprises the same metallic material as the first portion,
- wherein the second portion of the first pad is in contact with the second portion of the second pad, and
- wherein the first insulating layer is in contact with the second insulating layer.
A semiconductor device, comprising:
- a lower structure comprising a first circuit pattern provided on a first substrate, a first insulating layer provided on the first substrate to cover the first circuit pattern, and a first pad disposed in the first insulating layer and connected to the first circuit pattern;
- and
- an upper structure vertically connected to the lower structure, the upper structure comprising a second circuit pattern provided on a second substrate, a second insulating layer provided on the second substrate to cover the second circuit pattern, and a second pad disposed in the second insulating layer and connected to the second circuit pattern,
- wherein the first insulating layer is in direct contact with the second insulating layer,
- wherein each of the first and second pads comprises a first portion and a second portion, which is provided on the first portion and includes the same metallic material as the first portion,
- wherein an area of a surface of the second portion that faces the first portion is the same as an area of a surface of the first portion that faces the second portion,
- wherein, in each of the first and second pads, a grain size of the first portion is larger than a grain size of the second portion, and
- wherein the second portion of the first pad and the second portion of the second pad are bonded to each other to form a single object.
A method of fabricating a semiconductor device, comprising:
- forming a first insulating layer on a first substrate;
- patterning the first insulating layer to form a first recess portion;
- forming a first conductive layer on the first insulating layer to fill the first recess portion;
- performing a first planarization process on the first conductive layer to expose a top surface of the first insulating layer and to form a first portion of a first pad, a top surface of the first portion being located at a level lower than the top surface of the first insulating layer;
- performing a selective deposition process to form a second portion on the first portion of the first pad, the second portion comprising the same metallic material as the first portion;
- forming a second insulating layer on a second substrate;
- patterning the second insulating layer to form a second recess portion;
- forming a second conductive layer on the second insulating layer to fill the second recess portion;
- performing a second planarization process on the second conductive layer to expose a top surface of the second insulating layer and to form a second pad;
- and
- performing a thermal treatment process to bond the first pad to the second pad,
- wherein an area of a surface of the second portion that faces the first portion is the same as an area of a surface of the first portion that faces the second portion,
- wherein a grain size of the first portion is larger than a grain size of the second portion.
Dependencies are inferred from the claim text.