H10W 70/464
Additional interconnections in combination with leadframes
Official title: {Additional interconnections in combination with leadframes}
H10W70/464 (Additional interconnections in combination with leadframes) appears on 3,909 US grants and 4,596 published applications in this corpus.
Search patents in H10W- Granted patents
- 3,909
- Published applications
- 4,596
- Assignees
- 650
- Inventors
- 5,671
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 6 | 0 |
| 1977 | 3 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 4 | 0 |
| 1989 | 6 | 0 |
| 1990 | 7 | 0 |
| 1991 | 10 | 0 |
| 1992 | 18 | 0 |
| 1993 | 27 | 0 |
| 1994 | 35 | 0 |
| 1995 | 35 | 0 |
| 1996 | 28 | 0 |
| 1997 | 27 | 0 |
| 1998 | 32 | 0 |
| 1999 | 28 | 0 |
| 2000 | 23 | 0 |
| 2001 | 27 | 18 |
| 2002 | 31 | 29 |
| 2003 | 25 | 38 |
| 2004 | 42 | 50 |
| 2005 | 32 | 64 |
| 2006 | 43 | 68 |
| 2007 | 46 | 96 |
| 2008 | 42 | 128 |
| 2009 | 51 | 127 |
| 2010 | 118 | 138 |
| 2011 | 119 | 138 |
| 2012 | 125 | 148 |
| 2013 | 152 | 164 |
| 2014 | 159 | 213 |
| 2015 | 208 | 255 |
| 2016 | 237 | 252 |
| 2017 | 268 | 251 |
| 2018 | 218 | 254 |
| 2019 | 230 | 245 |
| 2020 | 229 | 294 |
| 2021 | 222 | 295 |
| 2022 | 213 | 292 |
| 2023 | 221 | 314 |
| 2024 | 216 | 342 |
| 2025 | 209 | 247 |
| 2026 | 135 | 136 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor package assembly with electric field modulation structures6 Oct 2026US 12,757,751 B2Nexperia B. V.
- Electronic device with high draft angle package structure6 Oct 2026US 12,757,753 B2Texas Instruments Incorporated
- Semiconductor module6 Oct 2026US 12,757,754 B2Denso Corporation
- Power semiconductor package6 Oct 2026US 12,757,757 B2Pierburg GmbH
- Method of making a multi-chip package device6 Oct 2026US 12,757,800 B2Force Mos Technology Co., Ltd.
- Grounded leads in a quad-flat package8 Oct 2026US 2026/0314439 A1STMicroelectronics International N. V.
- Apparatus including an isolation assembly1 Oct 2026US 2026/0305369 A1
- Dual die device with conductive plate substrate connection1 Oct 2026US 2026/0305384 A1
- Microelectronic device package with open cavity1 Oct 2026US 2026/0305456 A1Texas Instruments Incorporated
- Power device package1 Oct 2026US 2026/0305466 A1GaNrich Semiconductor Corporation
Most cited
By later US patents
- Semiconductor chip package377US 5,677,566 AMicron Technology, Inc. · 1997
- Method for producing high speed integrated circuits354US 5,214,845 AMicron Technology, Inc. · 1993
- Stacked multi-chip modules and method of manufacturing346US 5,422,435 ANational Semiconductor Corporation · 1995
- Semiconductor device having dual electrical contact sites344US 5,157,480 AMotorola, Inc. · 1992
- Molded circuit package having heat dissipating post312US 5,172,213 AAT&T Bell Laboratories · 1992