Stacked multi-chip modules and method of manufacturing

A circuit assembly, comprising:

• a semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at said first surface;
• a first substrate interconnect media having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at said first substrate interconnect media first surface, said first substrate interconnect media being mounted on and at least partially supported at its second surface by said semiconductor die first surface, said first substrate interconnect media having a hole extending therethrough from said first substrate interconnect media first surface to said first substrate interconnect media second surface to expose said semiconductor die electrical contact;
• and
• a fine wire conductor having first and second ends, said first end extending through said hole in said first substrate interconnect media and being connected to said semiconductor die electrical contact.

A circuit assembly, comprising:

• a carrier member having a principal mounting surface and a plurality of electrical leads;
• a semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact disposed at said semiconductor die first surface, said semiconductor die mounted to said carrier member and at least partially supported at its second surface by said principal mounting surface;
• and
• a first substrate interconnect media for use in line routing and line interconnections, said first substrate interconnect media having substantially parallel opposing first and second surfaces and at least one electrical contact disposed on one of said surfaces, said first substrate interconnect media being mounted on and at least partially supported at its second surface by said semiconductor die first surface, said first substrate interconnect media being positioned such that said semiconductor die electrical contact is exposed.

A method of manufacturing a circuit assembly, comprising the steps of:

• (a) dispensing a semiconductor die having substantially parallel opposing first and second surfaces and an electrical contact disposed at said first surface onto a carrier member having a principal mounting surface and a plurality of electrical leads, said semiconductor die being at least partially supported at its second surface by said principal mounting surface;
• (b) dispensing a first substrate interconnect media having substantially parallel opposing first and second surfaces and an electrical contact disposed at said first substrate interconnect media first surface onto said semiconductor die first surface, said first substrate interconnect media being at least partially supported at its second surface by said semiconductor die, said first substrate interconnect media having a hole extending therethrough from said first substrate interconnect media first surface to said first substrate interconnect media second surface to expose said semiconductor die electrical contact;
• and
• (c) connecting a first end of a first fine wire conductor to said semiconductor die electrical contact so that said first fine wire conductor extends through said hole in said first substrate interconnect media.